blob: 7c851fd041ff6daae67cfdad683f4f4046bd75cb [file] [log] [blame]
Patrick Williamsb542dec2023-06-09 01:26:37 -05001From d215b0c08e51192baab96d75beaeacf3abf8724e Mon Sep 17 00:00:00 2001
2From: Jens Wiklander <jens.wiklander@linaro.org>
3Date: Fri, 18 Nov 2022 15:40:04 +0100
4Subject: feat(qemu): update abi between spmd and spmc
5
6Updates the ABI between SPMD and the SPMC at S-EL1 so that the hard
7coded SPMC manifest can be replaced by a proper manifest via TOS FW
8Config. TOS FW Config is provided via QEMU_TOS_FW_CONFIG_DTS as a DTS
9file when building. The DTS is turned into a DTB which is added to the
10FIP.
11
12Note that this is an incompatible change and requires corresponding
13change in OP-TEE ("core: sel1 spmc: boot abi update").
14
15Upstream-Status: Accepted
16
17Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
18Change-Id: Ibabe78ef50a24f775492854ce5ac54e4d471e369
19---
20 plat/qemu/common/qemu_bl2_mem_params_desc.c | 18 +++++++++++-
21 plat/qemu/common/qemu_bl2_setup.c | 32 +++++++++++++--------
22 plat/qemu/common/qemu_io_storage.c | 16 ++++++++++-
23 plat/qemu/common/qemu_spmd_manifest.c | 31 --------------------
24 plat/qemu/qemu/include/platform_def.h | 3 ++
25 plat/qemu/qemu/platform.mk | 12 +++++++-
26 6 files changed, 66 insertions(+), 46 deletions(-)
27 delete mode 100644 plat/qemu/common/qemu_spmd_manifest.c
28
29diff --git a/plat/qemu/common/qemu_bl2_mem_params_desc.c b/plat/qemu/common/qemu_bl2_mem_params_desc.c
30index 5af3a2264..8d8047c92 100644
31--- a/plat/qemu/common/qemu_bl2_mem_params_desc.c
32+++ b/plat/qemu/common/qemu_bl2_mem_params_desc.c
33@@ -1,5 +1,5 @@
34 /*
35- * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
36+ * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
37 *
38 * SPDX-License-Identifier: BSD-3-Clause
39 */
40@@ -122,6 +122,22 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
41 #endif
42 .next_handoff_image_id = INVALID_IMAGE_ID,
43 },
44+
45+#if defined(SPD_spmd)
46+ /* Fill TOS_FW_CONFIG related information */
47+ {
48+ .image_id = TOS_FW_CONFIG_ID,
49+ SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
50+ VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
51+ SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
52+ VERSION_2, image_info_t, 0),
53+ .image_info.image_base = TOS_FW_CONFIG_BASE,
54+ .image_info.image_max_size = TOS_FW_CONFIG_LIMIT -
55+ TOS_FW_CONFIG_BASE,
56+ .next_handoff_image_id = INVALID_IMAGE_ID,
57+ },
58+#endif
59+
60 # endif /* QEMU_LOAD_BL32 */
61
62 /* Fill BL33 related information */
63diff --git a/plat/qemu/common/qemu_bl2_setup.c b/plat/qemu/common/qemu_bl2_setup.c
64index 2c0da15b9..6afa3a44d 100644
65--- a/plat/qemu/common/qemu_bl2_setup.c
66+++ b/plat/qemu/common/qemu_bl2_setup.c
67@@ -1,5 +1,5 @@
68 /*
69- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
70+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
71 *
72 * SPDX-License-Identifier: BSD-3-Clause
73 */
74@@ -149,8 +149,7 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
75 bl_mem_params_node_t *paged_mem_params = NULL;
76 #endif
77 #if defined(SPD_spmd)
78- unsigned int mode_rw = MODE_RW_64;
79- uint64_t pagable_part = 0;
80+ bl_mem_params_node_t *bl32_mem_params = NULL;
81 #endif
82
83 assert(bl_mem_params);
84@@ -170,17 +169,18 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
85 if (err != 0) {
86 WARN("OPTEE header parse error.\n");
87 }
88-#if defined(SPD_spmd)
89- mode_rw = bl_mem_params->ep_info.args.arg0;
90- pagable_part = bl_mem_params->ep_info.args.arg1;
91-#endif
92 #endif
93
94-#if defined(SPD_spmd)
95- bl_mem_params->ep_info.args.arg0 = ARM_PRELOADED_DTB_BASE;
96- bl_mem_params->ep_info.args.arg1 = pagable_part;
97- bl_mem_params->ep_info.args.arg2 = mode_rw;
98- bl_mem_params->ep_info.args.arg3 = 0;
99+#if defined(SPMC_OPTEE)
100+ /*
101+ * Explicit zeroes to unused registers since they may have
102+ * been populated by parse_optee_header() above.
103+ *
104+ * OP-TEE expects system DTB in x2 and TOS_FW_CONFIG in x0,
105+ * the latter is filled in below for TOS_FW_CONFIG_ID and
106+ * applies to any other SPMC too.
107+ */
108+ bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE;
109 #elif defined(SPD_opteed)
110 /*
111 * OP-TEE expect to receive DTB address in x2.
112@@ -224,6 +224,14 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
113
114 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
115 break;
116+#if defined(SPD_spmd)
117+ case TOS_FW_CONFIG_ID:
118+ /* An SPMC expects TOS_FW_CONFIG in x0/r0 */
119+ bl32_mem_params = get_bl_mem_params_node(BL32_IMAGE_ID);
120+ bl32_mem_params->ep_info.args.arg0 =
121+ bl_mem_params->image_info.image_base;
122+ break;
123+#endif
124 default:
125 /* Do nothing in default case */
126 break;
127diff --git a/plat/qemu/common/qemu_io_storage.c b/plat/qemu/common/qemu_io_storage.c
128index 1107e443f..e2d4932c0 100644
129--- a/plat/qemu/common/qemu_io_storage.c
130+++ b/plat/qemu/common/qemu_io_storage.c
131@@ -1,5 +1,5 @@
132 /*
133- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
134+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
135 *
136 * SPDX-License-Identifier: BSD-3-Clause
137 */
138@@ -24,6 +24,7 @@
139 #define BL2_IMAGE_NAME "bl2.bin"
140 #define BL31_IMAGE_NAME "bl31.bin"
141 #define BL32_IMAGE_NAME "bl32.bin"
142+#define TOS_FW_CONFIG_NAME "tos_fw_config.dtb"
143 #define BL32_EXTRA1_IMAGE_NAME "bl32_extra1.bin"
144 #define BL32_EXTRA2_IMAGE_NAME "bl32_extra2.bin"
145 #define BL33_IMAGE_NAME "bl33.bin"
146@@ -78,6 +79,10 @@ static const io_uuid_spec_t bl32_extra2_uuid_spec = {
147 .uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA2,
148 };
149
150+static const io_uuid_spec_t tos_fw_config_uuid_spec = {
151+ .uuid = UUID_TOS_FW_CONFIG,
152+};
153+
154 static const io_uuid_spec_t bl33_uuid_spec = {
155 .uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
156 };
157@@ -137,6 +142,10 @@ static const io_file_spec_t sh_file_spec[] = {
158 .path = BL32_EXTRA2_IMAGE_NAME,
159 .mode = FOPEN_MODE_RB
160 },
161+ [TOS_FW_CONFIG_ID] = {
162+ .path = TOS_FW_CONFIG_NAME,
163+ .mode = FOPEN_MODE_RB
164+ },
165 [BL33_IMAGE_ID] = {
166 .path = BL33_IMAGE_NAME,
167 .mode = FOPEN_MODE_RB
168@@ -252,6 +261,11 @@ static const struct plat_io_policy policies[] = {
169 open_fip
170 },
171 #endif
172+ [TOS_FW_CONFIG_ID] = {
173+ &fip_dev_handle,
174+ (uintptr_t)&tos_fw_config_uuid_spec,
175+ open_fip
176+ },
177 [BL33_IMAGE_ID] = {
178 &fip_dev_handle,
179 (uintptr_t)&bl33_uuid_spec,
180diff --git a/plat/qemu/common/qemu_spmd_manifest.c b/plat/qemu/common/qemu_spmd_manifest.c
181deleted file mode 100644
182index fd46e2675..000000000
183--- a/plat/qemu/common/qemu_spmd_manifest.c
184+++ /dev/null
185@@ -1,31 +0,0 @@
186-/*
187- * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
188- *
189- * SPDX-License-Identifier: BSD-3-Clause
190- */
191-
192-#include <assert.h>
193-
194-#include <services/spm_core_manifest.h>
195-
196-#include <plat/common/platform.h>
197-#include <platform_def.h>
198-
199-int plat_spm_core_manifest_load(spmc_manifest_attribute_t *manifest,
200- const void *pm_addr)
201-{
202- entry_point_info_t *ep_info = bl31_plat_get_next_image_ep_info(SECURE);
203-
204- assert(ep_info != NULL);
205- assert(manifest != NULL);
206-
207- manifest->major_version = 1;
208- manifest->minor_version = 0;
209- manifest->exec_state = ep_info->args.arg2;
210- manifest->load_address = BL32_BASE;
211- manifest->entrypoint = BL32_BASE;
212- manifest->binary_size = BL32_LIMIT - BL32_BASE;
213- manifest->spmc_id = 0x8000;
214-
215- return 0;
216-}
217diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h
218index c9ed6409f..5c3239cb8 100644
219--- a/plat/qemu/qemu/include/platform_def.h
220+++ b/plat/qemu/qemu/include/platform_def.h
221@@ -118,6 +118,9 @@
222 #define BL_RAM_BASE (SHARED_RAM_BASE + SHARED_RAM_SIZE)
223 #define BL_RAM_SIZE (SEC_SRAM_SIZE - SHARED_RAM_SIZE)
224
225+#define TOS_FW_CONFIG_BASE BL_RAM_BASE
226+#define TOS_FW_CONFIG_LIMIT (TOS_FW_CONFIG_BASE + PAGE_SIZE)
227+
228 /*
229 * BL1 specific defines.
230 *
231diff --git a/plat/qemu/qemu/platform.mk b/plat/qemu/qemu/platform.mk
232index 6becc32fa..02493025a 100644
233--- a/plat/qemu/qemu/platform.mk
234+++ b/plat/qemu/qemu/platform.mk
235@@ -212,7 +212,10 @@ BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \
236 ${QEMU_GIC_SOURCES}
237
238 ifeq (${SPD},spmd)
239-BL31_SOURCES += plat/qemu/common/qemu_spmd_manifest.c
240+BL31_SOURCES += plat/common/plat_spmd_manifest.c \
241+ common/uuid.c \
242+ ${LIBFDT_SRCS} \
243+ ${FDT_WRAPPERS_SOURCES}
244 endif
245 endif
246
247@@ -233,6 +236,13 @@ $(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
248 endif
249 endif
250
251+ifneq ($(QEMU_TOS_FW_CONFIG_DTS),)
252+FDT_SOURCES += ${QEMU_TOS_FW_CONFIG_DTS}
253+QEMU_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${QEMU_TOS_FW_CONFIG_DTS})).dtb
254+# Add the TOS_FW_CONFIG to FIP
255+$(eval $(call TOOL_ADD_PAYLOAD,${QEMU_TOS_FW_CONFIG},--tos-fw-config,${QEMU_TOS_FW_CONFIG}))
256+endif
257+
258 SEPARATE_CODE_AND_RODATA := 1
259 ENABLE_STACK_PROTECTOR := 0
260 ifneq ($(ENABLE_STACK_PROTECTOR), 0)
261--
2622.39.1.windows.1
263