blob: b9376a4904b458c8d6b31d0ebe179c27e90ca324 [file] [log] [blame]
Brad Bishop286d45c2018-10-02 15:21:57 -04001/*
2 * Copyright (C) 2011 - 2014 Xilinx
3 * Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14/dts-v1/;
15/include/ "zynq-7000.dtsi"
16
17/ {
18 model = "Zynq MicroZED Development Board";
19 compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
20
21 aliases {
22 ethernet0 = &gem0;
23 serial0 = &uart1;
24 };
25
26 memory {
27 device_type = "memory";
28 reg = <0x0 0x40000000>;
29 };
30
31 chosen {
32 bootargs = "earlycon";
33 stdout-path = "serial0:115200n8";
34 };
35
36 usb_phy0: phy0 {
37 compatible = "usb-nop-xceiv";
38 #phy-cells = <0>;
39 };
40};
41
42&clkc {
43 ps-clk-frequency = <33333333>;
44};
45
46&gem0 {
47 status = "okay";
48 phy-mode = "rgmii-id";
49 phy-handle = <&ethernet_phy>;
50
51 ethernet_phy: ethernet-phy@0 {
52 reg = <0>;
53 };
54};
55
56&sdhci0 {
57 status = "okay";
58};
59
60&uart1 {
61 status = "okay";
62};
63
64&usb0 {
65 status = "okay";
66 dr_mode = "host";
67 usb-phy = <&usb_phy0>;
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_usb0_default>;
70};
71
72&pinctrl0 {
73 pinctrl_usb0_default: usb0-default {
74 mux {
75 groups = "usb0_0_grp";
76 function = "usb0";
77 };
78
79 conf {
80 groups = "usb0_0_grp";
81 slew-rate = <0>;
82 io-standard = <1>;
83 };
84
85 conf-rx {
86 pins = "MIO29", "MIO31", "MIO36";
87 bias-high-impedance;
88 };
89
90 conf-tx {
91 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
92 "MIO35", "MIO37", "MIO38", "MIO39";
93 bias-disable;
94 };
95 };
96};