Patrick Williams | c0f7c04 | 2017-02-23 20:41:17 -0600 | [diff] [blame] | 1 | From 655e82c92d5c3875aee04322f1993d6b0774a7bf Mon Sep 17 00:00:00 2001 |
| 2 | From: Yousong Zhou <yszhou4tech@gmail.com> |
| 3 | Date: Mon, 15 Aug 2016 15:00:13 +0800 |
| 4 | Subject: [PATCH] mips: fix MIPS softfloat build issue |
| 5 | |
| 6 | The patch for o32.S is taken from OpenWrt packages repo 3a7a4bf "libffi: |
| 7 | fix MIPS softfloat build issue with current binutils" |
| 8 | |
| 9 | Signed-off-by: Felix Fietkau <nbd@openwrt.org> |
| 10 | Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> |
| 11 | --- |
| 12 | Upstream-Status: Backport [https://github.com/libffi/libffi/commit/2ded2a4f494165c93293afc14ab0be1243cf8c49] |
| 13 | src/mips/n32.S | 17 +++++++++++++++++ |
| 14 | src/mips/o32.S | 17 +++++++++++++++++ |
| 15 | 2 files changed, 34 insertions(+) |
| 16 | |
| 17 | diff --git a/src/mips/n32.S b/src/mips/n32.S |
| 18 | index c6985d3..8f25994 100644 |
| 19 | --- a/src/mips/n32.S |
| 20 | +++ b/src/mips/n32.S |
| 21 | @@ -107,6 +107,16 @@ loadregs: |
| 22 | |
| 23 | REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6. |
| 24 | |
| 25 | +#ifdef __mips_soft_float |
| 26 | + REG_L a0, 0*FFI_SIZEOF_ARG(t9) |
| 27 | + REG_L a1, 1*FFI_SIZEOF_ARG(t9) |
| 28 | + REG_L a2, 2*FFI_SIZEOF_ARG(t9) |
| 29 | + REG_L a3, 3*FFI_SIZEOF_ARG(t9) |
| 30 | + REG_L a4, 4*FFI_SIZEOF_ARG(t9) |
| 31 | + REG_L a5, 5*FFI_SIZEOF_ARG(t9) |
| 32 | + REG_L a6, 6*FFI_SIZEOF_ARG(t9) |
| 33 | + REG_L a7, 7*FFI_SIZEOF_ARG(t9) |
| 34 | +#else |
| 35 | and t4, t6, ((1<<FFI_FLAG_BITS)-1) |
| 36 | REG_L a0, 0*FFI_SIZEOF_ARG(t9) |
| 37 | beqz t4, arg1_next |
| 38 | @@ -193,6 +203,7 @@ arg7_next: |
| 39 | arg8_doublep: |
| 40 | l.d $f19, 7*FFI_SIZEOF_ARG(t9) |
| 41 | arg8_next: |
| 42 | +#endif |
| 43 | |
| 44 | callit: |
| 45 | # Load the function pointer |
| 46 | @@ -214,6 +225,7 @@ retint: |
| 47 | b epilogue |
| 48 | |
| 49 | retfloat: |
| 50 | +#ifndef __mips_soft_float |
| 51 | bne t6, FFI_TYPE_FLOAT, retdouble |
| 52 | jal t9 |
| 53 | REG_L t4, 4*FFI_SIZEOF_ARG($fp) |
| 54 | @@ -272,6 +284,7 @@ retstruct_f_d: |
| 55 | s.s $f0, 0(t4) |
| 56 | s.d $f2, 8(t4) |
| 57 | b epilogue |
| 58 | +#endif |
| 59 | |
| 60 | retstruct_d_soft: |
| 61 | bne t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft |
| 62 | @@ -429,6 +442,7 @@ ffi_closure_N32: |
| 63 | REG_S a6, A6_OFF2($sp) |
| 64 | REG_S a7, A7_OFF2($sp) |
| 65 | |
| 66 | +#ifndef __mips_soft_float |
| 67 | # Store all possible float/double registers. |
| 68 | s.d $f12, F12_OFF2($sp) |
| 69 | s.d $f13, F13_OFF2($sp) |
| 70 | @@ -438,6 +452,7 @@ ffi_closure_N32: |
| 71 | s.d $f17, F17_OFF2($sp) |
| 72 | s.d $f18, F18_OFF2($sp) |
| 73 | s.d $f19, F19_OFF2($sp) |
| 74 | +#endif |
| 75 | |
| 76 | # Call ffi_closure_mips_inner_N32 to do the real work. |
| 77 | LA t9, ffi_closure_mips_inner_N32 |
| 78 | @@ -458,6 +473,7 @@ cls_retint: |
| 79 | b cls_epilogue |
| 80 | |
| 81 | cls_retfloat: |
| 82 | +#ifndef __mips_soft_float |
| 83 | bne v0, FFI_TYPE_FLOAT, cls_retdouble |
| 84 | l.s $f0, V0_OFF2($sp) |
| 85 | b cls_epilogue |
| 86 | @@ -500,6 +516,7 @@ cls_retstruct_f_d: |
| 87 | l.s $f0, V0_OFF2($sp) |
| 88 | l.d $f2, V1_OFF2($sp) |
| 89 | b cls_epilogue |
| 90 | +#endif |
| 91 | |
| 92 | cls_retstruct_small2: |
| 93 | REG_L v0, V0_OFF2($sp) |
| 94 | diff --git a/src/mips/o32.S b/src/mips/o32.S |
| 95 | index eb27981..429dd0a 100644 |
| 96 | --- a/src/mips/o32.S |
| 97 | +++ b/src/mips/o32.S |
| 98 | @@ -82,13 +82,16 @@ sixteen: |
| 99 | |
| 100 | ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args |
| 101 | |
| 102 | +#ifndef __mips_soft_float |
| 103 | bnez t0, pass_d # make it quick for int |
| 104 | +#endif |
| 105 | REG_L a0, 0*FFI_SIZEOF_ARG($sp) # just go ahead and load the |
| 106 | REG_L a1, 1*FFI_SIZEOF_ARG($sp) # four regs. |
| 107 | REG_L a2, 2*FFI_SIZEOF_ARG($sp) |
| 108 | REG_L a3, 3*FFI_SIZEOF_ARG($sp) |
| 109 | b call_it |
| 110 | |
| 111 | +#ifndef __mips_soft_float |
| 112 | pass_d: |
| 113 | bne t0, FFI_ARGS_D, pass_f |
| 114 | l.d $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args |
| 115 | @@ -130,6 +133,7 @@ pass_f_d: |
| 116 | # bne t0, FFI_ARGS_F_D, call_it |
| 117 | l.s $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args |
| 118 | l.d $f14, 2*FFI_SIZEOF_ARG($sp) # passing double and float |
| 119 | +#endif |
| 120 | |
| 121 | call_it: |
| 122 | # Load the function pointer |
| 123 | @@ -158,14 +162,23 @@ retfloat: |
| 124 | bne t2, FFI_TYPE_FLOAT, retdouble |
| 125 | jalr t9 |
| 126 | REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp) |
| 127 | +#ifndef __mips_soft_float |
| 128 | s.s $f0, 0(t0) |
| 129 | +#else |
| 130 | + REG_S v0, 0(t0) |
| 131 | +#endif |
| 132 | b epilogue |
| 133 | |
| 134 | retdouble: |
| 135 | bne t2, FFI_TYPE_DOUBLE, noretval |
| 136 | jalr t9 |
| 137 | REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp) |
| 138 | +#ifndef __mips_soft_float |
| 139 | s.d $f0, 0(t0) |
| 140 | +#else |
| 141 | + REG_S v1, 4(t0) |
| 142 | + REG_S v0, 0(t0) |
| 143 | +#endif |
| 144 | b epilogue |
| 145 | |
| 146 | noretval: |
| 147 | @@ -261,9 +274,11 @@ $LCFI7: |
| 148 | li $13, 1 # FFI_O32 |
| 149 | bne $16, $13, 1f # Skip fp save if FFI_O32_SOFT_FLOAT |
| 150 | |
| 151 | +#ifndef __mips_soft_float |
| 152 | # Store all possible float/double registers. |
| 153 | s.d $f12, FA_0_0_OFF2($fp) |
| 154 | s.d $f14, FA_1_0_OFF2($fp) |
| 155 | +#endif |
| 156 | 1: |
| 157 | # Call ffi_closure_mips_inner_O32 to do the work. |
| 158 | la t9, ffi_closure_mips_inner_O32 |
| 159 | @@ -281,6 +296,7 @@ $LCFI7: |
| 160 | li $13, 1 # FFI_O32 |
| 161 | bne $16, $13, 1f # Skip fp restore if FFI_O32_SOFT_FLOAT |
| 162 | |
| 163 | +#ifndef __mips_soft_float |
| 164 | li $9, FFI_TYPE_FLOAT |
| 165 | l.s $f0, V0_OFF2($fp) |
| 166 | beq $8, $9, closure_done |
| 167 | @@ -288,6 +304,7 @@ $LCFI7: |
| 168 | li $9, FFI_TYPE_DOUBLE |
| 169 | l.d $f0, V0_OFF2($fp) |
| 170 | beq $8, $9, closure_done |
| 171 | +#endif |
| 172 | 1: |
| 173 | REG_L $3, V1_OFF2($fp) |
| 174 | REG_L $2, V0_OFF2($fp) |
| 175 | -- |
| 176 | 2.9.3 |
| 177 | |