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gerrit.openbmc.org / openbmc / openbmc / 6d12da5d6762e0cc0d543f1d41d367d762c23bad / . / meta-arm / meta-arm-bsp / recipes-bsp / trusted-firmware-m / files / corstone1000 / 0008-Platform-corstone1000-BL1-changes-to-adapt-to-new-fl.patch
blob: d9143a0eb6db1a56d2a5c01c511bbb1564f8724c [file] [log] [blame]
Andrew Geissler2daf84b2023-03-31 09:57:23 -0500[diff] [blame]1From f70bbd0d8efefcc69916fc0393bc413fb39924af Mon Sep 17 00:00:00 2001
2From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
3Date: Tue, 10 Jan 2023 22:33:26 +0000
4Subject: [PATCH 8/10] Platform: corstone1000: BL1 changes to adapt to new flash
5 layout
6
7The commit prepares BL1 to adapt to new GPT-based flash layout.
8
9BL1 does not incorporate a GPT parser and still uses a static
10configuration to understand the flash.
11
12The flash_layout.h is also modified/marked in a way to start
13the process of its simplification.
14
15Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
16Upstream-Status: Pending [Not submitted to upstream yet]
17Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
18Upstream-Status: Pending [Not submitted to upstream yet]
19---
20 .../arm/corstone1000/bl1/bl1_boot_hal.c | 10 +--
21 .../arm/corstone1000/bl1/bl1_flash_map.c | 17 ++--
22 .../target/arm/corstone1000/bl2_flash_map.c | 8 +-
23 .../corstone1000/fw_update_agent/fwu_agent.c | 16 ++--
24 .../corstone1000/fw_update_agent/fwu_agent.h | 4 +-
25 .../arm/corstone1000/partition/flash_layout.h | 84 +++++++++----------
26 6 files changed, 66 insertions(+), 73 deletions(-)
27
28diff --git a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
29index 9caa26b26c..a5fe0f7da1 100644
30--- a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
31+++ b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
32@@ -1,5 +1,5 @@
33 /*
34- * Copyright (c) 2019-2022, Arm Limited. All rights reserved.
35+ * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
36 *
37 * SPDX-License-Identifier: BSD-3-Clause
38 *
39@@ -601,12 +601,12 @@ __attribute__((naked)) void boot_clear_bl2_ram_area(void)
40 );
41 }
42
43-extern void add_bank_offset_to_image_offset(uint32_t bank_offset);
44+extern void set_flash_area_image_offset(uint32_t offset);
45
46 int32_t boot_platform_init(void)
47 {
48 int32_t result;
49- uint32_t bank_offset;
50+ uint32_t image_offset;
51
52 result = corstone1000_watchdog_init();
53 if (result != ARM_DRIVER_OK) {
54@@ -653,8 +653,8 @@ int32_t boot_platform_init(void)
55 }
56 }
57
58- bl1_get_boot_bank(&bank_offset);
59- add_bank_offset_to_image_offset(bank_offset);
60+ bl1_get_active_bl2_image(&image_offset);
61+ set_flash_area_image_offset(image_offset);
62
63 return 0;
64 }
65diff --git a/platform/ext/target/arm/corstone1000/bl1/bl1_flash_map.c b/platform/ext/target/arm/corstone1000/bl1/bl1_flash_map.c
66index c8a1f13319..0e615da254 100644
67--- a/platform/ext/target/arm/corstone1000/bl1/bl1_flash_map.c
68+++ b/platform/ext/target/arm/corstone1000/bl1/bl1_flash_map.c
69@@ -1,5 +1,5 @@
70 /*
71- * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
72+ * Copyright (c) 2019-2021, 2023 Arm Limited. All rights reserved.
73 *
74 * SPDX-License-Identifier: BSD-3-Clause
75 *
76@@ -22,23 +22,22 @@ struct flash_area flash_map[] = {
77 .fa_id = FLASH_AREA_8_ID,
78 .fa_device_id = FLASH_DEVICE_ID,
79 .fa_driver = &FLASH_DEV_NAME,
80- .fa_off = FLASH_AREA_8_OFFSET,
81+ .fa_off = FLASH_INVALID_OFFSET,
82 .fa_size = FLASH_AREA_8_SIZE,
83 },
84+ /* Secondary slot is not supported */
85 {
86- .fa_id = FLASH_AREA_9_ID,
87+ .fa_id = FLASH_INVALID_ID,
88 .fa_device_id = FLASH_DEVICE_ID,
89 .fa_driver = &FLASH_DEV_NAME,
90- .fa_off = FLASH_AREA_9_OFFSET,
91- .fa_size = FLASH_AREA_9_SIZE,
92+ .fa_off = FLASH_INVALID_OFFSET,
93+ .fa_size = FLASH_INVALID_SIZE,
94 },
95 };
96
97 const int flash_map_entry_num = ARRAY_SIZE(flash_map);
98
99-void add_bank_offset_to_image_offset(uint32_t bank_offset)
100+void set_flash_area_image_offset(uint32_t offset)
101 {
102- for (int i = 0; i < flash_map_entry_num; i++) {
103- flash_map[i].fa_off += bank_offset;
104- }
105+ flash_map[0].fa_off = offset;
106 }
107diff --git a/platform/ext/target/arm/corstone1000/bl2_flash_map.c b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
108index 0a6a592d94..f512045a44 100644
109--- a/platform/ext/target/arm/corstone1000/bl2_flash_map.c
110+++ b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
111@@ -28,15 +28,15 @@ struct flash_area flash_map[] = {
112 .fa_id = FLASH_AREA_0_ID,
113 .fa_device_id = FLASH_DEVICE_ID,
114 .fa_driver = &FLASH_DEV_NAME,
115- .fa_off = FLASH_AREA_0_OFFSET,
116- .fa_size = FLASH_AREA_0_SIZE,
117+ .fa_off = FLASH_INVALID_OFFSET,
118+ .fa_size = FLASH_INVALID_SIZE,
119 },
120 {
121 .fa_id = FLASH_AREA_1_ID,
122 .fa_device_id = FLASH_DEVICE_ID,
123 .fa_driver = &FLASH_DEV_NAME,
124- .fa_off = FLASH_AREA_1_OFFSET,
125- .fa_size = FLASH_AREA_1_SIZE,
126+ .fa_off = FLASH_INVALID_OFFSET,
127+ .fa_size = FLASH_INVALID_SIZE,
128 },
129 #ifndef TFM_S_REG_TEST
130 {
131diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
132index eb17c3a377..e4f9da1ec3 100644
133--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
134+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
135@@ -154,7 +154,7 @@ static enum fwu_agent_error_t private_metadata_read(
136 return FWU_AGENT_ERROR;
137 }
138
139- ret = FWU_METADATA_FLASH_DEV.ReadData(FWU_PRIVATE_AREA_OFFSET, p_metadata,
140+ ret = FWU_METADATA_FLASH_DEV.ReadData(FWU_PRIVATE_METADATA_REPLICA_1_OFFSET, p_metadata,
141 sizeof(struct fwu_private_metadata));
142 if (ret < 0 || ret != sizeof(struct fwu_private_metadata)) {
143 return FWU_AGENT_ERROR;
144@@ -178,12 +178,12 @@ static enum fwu_agent_error_t private_metadata_write(
145 return FWU_AGENT_ERROR;
146 }
147
148- ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_PRIVATE_AREA_OFFSET);
149+ ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_PRIVATE_METADATA_REPLICA_1_OFFSET);
150 if (ret != ARM_DRIVER_OK) {
151 return FWU_AGENT_ERROR;
152 }
153
154- ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_PRIVATE_AREA_OFFSET,
155+ ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_PRIVATE_METADATA_REPLICA_1_OFFSET,
156 p_metadata, sizeof(struct fwu_private_metadata));
157 if (ret < 0 || ret != sizeof(struct fwu_private_metadata)) {
158 return FWU_AGENT_ERROR;
159@@ -769,7 +769,7 @@ static enum fwu_agent_error_t fwu_select_previous(
160
161 }
162
163-void bl1_get_boot_bank(uint32_t *bank_offset)
164+void bl1_get_active_bl2_image(uint32_t *offset)
165 {
166 struct fwu_private_metadata priv_metadata;
167 enum fwu_agent_state_t current_state;
168@@ -823,15 +823,15 @@ void bl1_get_boot_bank(uint32_t *bank_offset)
169 }
170
171 if (boot_index == BANK_0) {
172- *bank_offset = BANK_0_PARTITION_OFFSET;
173+ *offset = SE_BL2_BANK_0_OFFSET;
174 } else if (boot_index == BANK_1) {
175- *bank_offset = BANK_1_PARTITION_OFFSET;
176+ *offset = SE_BL2_BANK_1_OFFSET;
177 } else {
178 FWU_ASSERT(0);
179 }
180
181- FWU_LOG_MSG("%s: exit: booting from bank = %u, offset = %x\n\r", __func__,
182- boot_index, *bank_offset);
183+ FWU_LOG_MSG("%s: exit: booting from bank = %u, offset = 0x%x\n\r", __func__,
184+ boot_index, *offset);
185
186 return;
187 }
188diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
189index 00a08354be..eb8320ed8a 100644
190--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
191+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
192@@ -1,5 +1,5 @@
193 /*
194- * Copyright (c) 2021, Arm Limited. All rights reserved.
195+ * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
196 *
197 * SPDX-License-Identifier: BSD-3-Clause
198 *
199@@ -44,7 +44,7 @@ enum fwu_agent_error_t corstone1000_fwu_flash_image(void);
200 */
201 enum fwu_agent_error_t corstone1000_fwu_host_ack(void);
202
203-void bl1_get_boot_bank(uint32_t *bank_offset);
204+void bl1_get_active_bl2_image(uint32_t *bank_offset);
205 void bl2_get_boot_bank(uint32_t *bank_offset);
206
207 /* When in trial state, start the timer for host to respond.
208diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
209index 5970a13c12..347c91acbb 100644
210--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
211+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
212@@ -1,5 +1,5 @@
213 /*
214- * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
215+ * Copyright (c) 2017-2023 Arm Limited. All rights reserved.
216 *
217 * Licensed under the Apache License, Version 2.0 (the "License");
218 * you may not use this file except in compliance with the License.
219@@ -98,56 +98,56 @@
220
221 #endif
222
223-/* Flash layout (32MB) :-
224- *
225- * 1 MB : FWU_METADATA_PARTITION_SIZE
226- * 15.5 MB : BANK 1 PARTITION SIZE
227- * 15.5 MB : BANK 2 PARTITION SIZE
228- *
229- */
230-#define FWU_METADATA_PARTITION_SIZE (0x100000) /* 1MB */
231-#define BANK_PARTITION_SIZE (0xF80000) /* 15.5 MB */
232+/* Static Configurations of the Flash */
233+#define SE_BL2_PARTITION_SIZE (0x18800) /* 98 KB */
234+#define SE_BL2_BANK_0_OFFSET (0x9000) /* 72nd LBA */
235+#define SE_BL2_BANK_1_OFFSET (0x1002000) /* 32784th LBA */
236
237-#define FLASH_BASE_OFFSET (0x0)
238+/* Space in flash to store metadata and uefi variables */
239+#define FWU_METADATA_FLASH_DEV (FLASH_DEV_NAME)
240+#define FWU_METADATA_FLASH_SECTOR_SIZE (FLASH_SECTOR_SIZE)
241
242-/* BANK layout (15MB: BANK_PARTITION_SIZE) :-
243- *
244- * 200 KB : SE_BL2_PARTITION_SIZE + SE_BL2_PARTITION_SIZE
245- * 752 KB : TFM_PARTITION_SIZE + TFM_PARTITION_SIZE
246- * 2 MB : FIP_PARTITION_SIZE
247- * 12+ MB : KERNEL_PARTITION_SIZE
248- *
249- */
250-#define SE_BL2_PARTITION_SIZE (0x19000) /* 100 KB */
251-#define TFM_PARTITION_SIZE (0x5E000) /* 376 KB */
252-#define FIP_PARTITION_SIZE (0x200000) /* 2 MB */
253-#define KERNEL_PARTITION_SIZE (0xC00000) /* 12 MB */
254+#define FWU_METADATA_REPLICA_1_OFFSET (0x5000) /* 40th LBA */
255+#define FWU_METADATA_REPLICA_2_OFFSET (FWU_METADATA_REPLICA_1_OFFSET + \
256+ FWU_METADATA_FLASH_SECTOR_SIZE)
257
258+#define FWU_PRIVATE_METADATA_REPLICA_1_OFFSET (FWU_METADATA_REPLICA_2_OFFSET + \
259+ FWU_METADATA_FLASH_SECTOR_SIZE)
260+#define FWU_PRIVATE_METADATA_REPLICA_2_OFFSET (FWU_PRIVATE_METADATA_REPLICA_1_OFFSET + \
261+ FWU_METADATA_FLASH_SECTOR_SIZE)
262
263+#define BANK_0_PARTITION_OFFSET (SE_BL2_BANK_0_OFFSET + \
264+ SE_BL2_PARTITION_SIZE)
265+#define BANK_1_PARTITION_OFFSET (SE_BL2_BANK_1_OFFSET + \
266+ SE_BL2_PARTITION_SIZE)
267
268+/* BL1: mcuboot flashmap configurations */
269+#define FLASH_AREA_8_ID (1)
270+#define FLASH_AREA_8_SIZE (SE_BL2_PARTITION_SIZE)
271
272-/* 1MB: space in flash to store metadata and uefi variables */
273-#define FWU_METADATA_FLASH_DEV (FLASH_DEV_NAME)
274-#define FWU_METADATA_FLASH_SECTOR_SIZE (FLASH_SECTOR_SIZE)
275+#define FLASH_INVALID_ID (0xFF)
276+#define FLASH_INVALID_OFFSET (0xFFFFFFFF)
277+#define FLASH_INVALID_SIZE (0xFFFFFFFF)
278
279-#define FWU_METADATA_PARTITION_OFFSET (FLASH_BASE_OFFSET)
280-#define FWU_METADATA_AREA_SIZE (FWU_METADATA_FLASH_SECTOR_SIZE)
281-#define FWU_METADATA_REPLICA_1_OFFSET (FLASH_BASE_OFFSET)
282-#define FWU_METADATA_REPLICA_2_OFFSET (FWU_METADATA_REPLICA_1_OFFSET + \
283- FWU_METADATA_AREA_SIZE)
284-#define FWU_PRIVATE_AREA_SIZE (FLASH_SECTOR_SIZE)
285-#define FWU_PRIVATE_AREA_OFFSET (FWU_METADATA_REPLICA_2_OFFSET + \
286- FWU_METADATA_AREA_SIZE)
287+#define BL1_FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_8_ID : \
288+ 255 )
289+#define BL1_FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_INVALID_ID : \
290+ 255 )
291+
292+#define BL1_FLASH_AREA_IMAGE_SCRATCH 255
293
294+/* FWU Configurations */
295 #define NR_OF_FW_BANKS (2)
296 #define NR_OF_IMAGES_IN_FW_BANK (4) /* Secure Enclave: BL2 and TF-M \
297 * Host: FIP and Kernel image
298 */
299
300-#define BANK_0_PARTITION_OFFSET (FWU_METADATA_PARTITION_OFFSET + \
301- FWU_METADATA_PARTITION_SIZE)
302-#define BANK_1_PARTITION_OFFSET (BANK_0_PARTITION_OFFSET + \
303- BANK_PARTITION_SIZE)
304+/****** TODO: START : NEED SIMPLIFICATION BASED ON GPT *******************/
305+/* Bank configurations */
306+#define BANK_PARTITION_SIZE (0xFE0000) /* 15.875 MB */
307+#define TFM_PARTITION_SIZE (0x5E000) /* 376 KB */
308+#define FIP_PARTITION_SIZE (0x200000) /* 2 MB */
309+#define KERNEL_PARTITION_SIZE (0xC00000) /* 12 MB */
310
311 /************************************************************/
312 /* Bank : Images flash offsets are with respect to the bank */
313@@ -170,13 +170,6 @@
314 #define BL2_IMAGE_OFFSET (0x0)
315 #define BL2_IMAGE_MAX_SIZE (SE_BL2_PARTITION_SIZE)
316
317-#define BL1_FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_8_ID : \
318- 255 )
319-#define BL1_FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_9_ID : \
320- 255 )
321-
322-#define BL1_FLASH_AREA_IMAGE_SCRATCH 255
323-
324 /* Image 1: TF-M primary and secondary images */
325 #define FLASH_AREA_0_ID (1)
326 #define FLASH_AREA_0_OFFSET (FLASH_AREA_9_OFFSET + \
327@@ -229,6 +222,7 @@
328 #define FWU_METADATA_IMAGE_3_OFFSET (KERNEL_PARTITION_OFFSET)
329 #define FWU_METADATA_IMAGE_3_SIZE_LIMIT (KERNEL_PARTITION_SIZE)
330
331+/****** TODO: END : NEED SIMPLIFICATION BASED ON GPT *******************/
332
333 /*******************************/
334 /*** ITS, PS and NV Counters ***/
335--
3362.25.1
337