Andrew Geissler | 2daf84b | 2023-03-31 09:57:23 -0500 | [diff] [blame] | 1 | From 6f95d99329e178b7dea5cf7affac2c55135bbb85 Mon Sep 17 00:00:00 2001 |
| 2 | From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> |
| 3 | Date: Wed, 11 Jan 2023 10:27:04 +0000 |
| 4 | Subject: [PATCH 9/10] Platform:corstone1000: BL2 uses GPT layout |
| 5 | |
| 6 | Adabt BL2 to use GPT parser find tfm and fip partitions, and then |
| 7 | extract info to populate MCUBOOT flashmap. |
| 8 | |
| 9 | Side changes required: |
| 10 | Borrow 2k of BL2 code memory to Data memory (during linking) |
| 11 | i.e. Increase BL2_DATA_GAP_SIZE and decrease SE_BL2_PARTITION_SIZE |
| 12 | |
| 13 | Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> |
| 14 | Upstream-Status: Pending [Not submitted to upstream yet] |
| 15 | --- |
| 16 | .../target/arm/corstone1000/CMakeLists.txt | 5 +- |
| 17 | .../target/arm/corstone1000/bl2_flash_map.c | 7 -- |
| 18 | .../target/arm/corstone1000/boot_hal_bl2.c | 86 +++++++++++++----- |
| 19 | .../corstone1000/fw_update_agent/fwu_agent.c | 24 ++--- |
| 20 | .../corstone1000/fw_update_agent/fwu_agent.h | 2 +- |
| 21 | .../arm/corstone1000/partition/flash_layout.h | 2 +- |
| 22 | .../ext/target/arm/corstone1000/platform.c | 87 ++++++++++++++++++- |
| 23 | .../ext/target/arm/corstone1000/platform.h | 10 +++ |
| 24 | 8 files changed, 168 insertions(+), 55 deletions(-) |
| 25 | |
| 26 | diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt |
| 27 | index a120f39ea4..f16c1c40b0 100644 |
| 28 | --- a/platform/ext/target/arm/corstone1000/CMakeLists.txt |
| 29 | +++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt |
| 30 | @@ -130,6 +130,10 @@ target_sources(platform_bl2 |
| 31 | io/io_block.c |
| 32 | io/io_flash.c |
| 33 | io/io_storage.c |
| 34 | + soft_crc/soft_crc.c |
| 35 | + partition/partition.c |
| 36 | + partition/gpt.c |
| 37 | + platform.c |
| 38 | ) |
| 39 | |
| 40 | if (PLATFORM_IS_FVP) |
| 41 | @@ -174,7 +178,6 @@ target_compile_definitions(bl2 |
| 42 | $<$<BOOL:${CRYPTO_HW_ACCELERATOR}>:CRYPTO_HW_ACCELERATOR> |
| 43 | $<$<BOOL:${CRYPTO_HW_ACCELERATOR_OTP_PROVISIONING}>:CRYPTO_HW_ACCELERATOR_OTP_PROVISIONING> |
| 44 | $<$<BOOL:${PLATFORM_PSA_ADAC_SECURE_DEBUG}>:PLATFORM_PSA_ADAC_SECURE_DEBUG> |
| 45 | - |
| 46 | ) |
| 47 | target_compile_definitions(bootutil |
| 48 | PRIVATE |
| 49 | diff --git a/platform/ext/target/arm/corstone1000/bl2_flash_map.c b/platform/ext/target/arm/corstone1000/bl2_flash_map.c |
| 50 | index f512045a44..599f80b411 100644 |
| 51 | --- a/platform/ext/target/arm/corstone1000/bl2_flash_map.c |
| 52 | +++ b/platform/ext/target/arm/corstone1000/bl2_flash_map.c |
| 53 | @@ -58,13 +58,6 @@ struct flash_area flash_map[] = { |
| 54 | |
| 55 | const int flash_map_entry_num = ARRAY_SIZE(flash_map); |
| 56 | |
| 57 | -void add_bank_offset_to_image_offset(uint32_t bank_offset) |
| 58 | -{ |
| 59 | - for (int i = 0; i < flash_map_entry_num; i++) { |
| 60 | - flash_map[i].fa_off += bank_offset; |
| 61 | - } |
| 62 | -} |
| 63 | - |
| 64 | int boot_get_image_exec_ram_info(uint32_t image_id, |
| 65 | uint32_t *exec_ram_start, |
| 66 | uint32_t *exec_ram_size) |
| 67 | diff --git a/platform/ext/target/arm/corstone1000/boot_hal_bl2.c b/platform/ext/target/arm/corstone1000/boot_hal_bl2.c |
| 68 | index 323d9707fe..52db26beea 100644 |
| 69 | --- a/platform/ext/target/arm/corstone1000/boot_hal_bl2.c |
| 70 | +++ b/platform/ext/target/arm/corstone1000/boot_hal_bl2.c |
| 71 | @@ -1,5 +1,5 @@ |
| 72 | /* |
| 73 | - * Copyright (c) 2019-2022, Arm Limited. All rights reserved. |
| 74 | + * Copyright (c) 2019-2023, Arm Limited. All rights reserved. |
| 75 | * |
| 76 | * SPDX-License-Identifier: BSD-3-Clause |
| 77 | * |
| 78 | @@ -30,6 +30,14 @@ |
| 79 | #include "crypto_hw.h" |
| 80 | #endif |
| 81 | |
| 82 | +#include "efi.h" |
| 83 | +#include "partition.h" |
| 84 | +#include "platform.h" |
| 85 | + |
| 86 | +static const uint8_t * const tfm_part_names[] = {"tfm_primary", "tfm_secondary"}; |
| 87 | +static const uint8_t * const fip_part_names[] = {"FIP_A", "FIP_B"}; |
| 88 | + |
| 89 | + |
| 90 | /* Flash device name must be specified by target */ |
| 91 | extern ARM_DRIVER_FLASH FLASH_DEV_NAME; |
| 92 | |
| 93 | @@ -39,28 +47,62 @@ REGION_DECLARE(Image$$, ARM_LIB_HEAP, $$ZI$$Limit)[]; |
| 94 | #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof((arr)[0])) |
| 95 | extern struct flash_area flash_map[]; |
| 96 | |
| 97 | -int32_t fill_bl2_flash_map_by_parsing_fips(uint32_t bank_offset) |
| 98 | -{ |
| 99 | - int result; |
| 100 | +static bool fill_flash_map_with_tfm_data(uint8_t boot_index) { |
| 101 | + |
| 102 | + if (boot_index >= ARRAY_SIZE(tfm_part_names)) { |
| 103 | + BOOT_LOG_ERR("%d is an invalid boot_index, 0 <= boot_index < %d", |
| 104 | + boot_index, ARRAY_SIZE(tfm_part_names)); |
| 105 | + return false; |
| 106 | + } |
| 107 | + partition_entry_t *tfm_entry = |
| 108 | + get_partition_entry(tfm_part_names[boot_index]); |
| 109 | + if (tfm_entry == NULL) { |
| 110 | + BOOT_LOG_ERR("Could not find partition %s", tfm_part_names[boot_index]); |
| 111 | + return false; |
| 112 | + } |
| 113 | + flash_map[0].fa_off = tfm_entry->start; |
| 114 | + flash_map[0].fa_size = tfm_entry->length; |
| 115 | + return true; |
| 116 | +} |
| 117 | + |
| 118 | +static bool fill_flash_map_with_fip_data(uint8_t boot_index) { |
| 119 | uint32_t tfa_offset = 0; |
| 120 | - uint32_t tfa_size = 0; |
| 121 | + size_t tfa_size = 0; |
| 122 | + uint32_t fip_offset = 0; |
| 123 | + size_t fip_size = 0; |
| 124 | + int result; |
| 125 | + |
| 126 | + if (boot_index >= ARRAY_SIZE(fip_part_names)) { |
| 127 | + BOOT_LOG_ERR("%d is an invalid boot_index, 0 <= boot_index < %d", |
| 128 | + boot_index, ARRAY_SIZE(fip_part_names)); |
| 129 | + return false; |
| 130 | + } |
| 131 | + partition_entry_t *fip_entry = |
| 132 | + get_partition_entry(fip_part_names[boot_index]); |
| 133 | + if (fip_entry == NULL) { |
| 134 | + BOOT_LOG_ERR("Could not find partition %s", fip_part_names[boot_index]); |
| 135 | + return false; |
| 136 | + } |
| 137 | + |
| 138 | + fip_offset = fip_entry->start; |
| 139 | + fip_size = fip_entry->length; |
| 140 | |
| 141 | /* parse directly from flash using XIP mode */ |
| 142 | /* FIP is large so its not a good idea to load it in memory */ |
| 143 | - result = parse_fip_and_extract_tfa_info(bank_offset + FLASH_FIP_ADDRESS, |
| 144 | - FLASH_FIP_SIZE, |
| 145 | - &tfa_offset, &tfa_size); |
| 146 | + result = parse_fip_and_extract_tfa_info( |
| 147 | + FLASH_BASE_ADDRESS + fip_offset + FIP_SIGNATURE_AREA_SIZE, fip_size, |
| 148 | + &tfa_offset, &tfa_size); |
| 149 | if (result != FIP_PARSER_SUCCESS) { |
| 150 | BOOT_LOG_ERR("parse_fip_and_extract_tfa_info failed"); |
| 151 | - return 1; |
| 152 | + return false; |
| 153 | } |
| 154 | |
| 155 | - flash_map[2].fa_off = FLASH_FIP_OFFSET + tfa_offset; |
| 156 | + flash_map[2].fa_off = fip_offset + FIP_SIGNATURE_AREA_SIZE + tfa_offset; |
| 157 | flash_map[2].fa_size = tfa_size; |
| 158 | flash_map[3].fa_off = flash_map[2].fa_off + flash_map[2].fa_size; |
| 159 | flash_map[3].fa_size = tfa_size; |
| 160 | |
| 161 | - return 0; |
| 162 | + return true; |
| 163 | } |
| 164 | |
| 165 | #ifdef PLATFORM_PSA_ADAC_SECURE_DEBUG |
| 166 | @@ -89,26 +131,29 @@ uint8_t secure_debug_rotpk[32]; |
| 167 | |
| 168 | #endif |
| 169 | |
| 170 | -extern void add_bank_offset_to_image_offset(uint32_t bank_offset); |
| 171 | - |
| 172 | int32_t boot_platform_init(void) |
| 173 | { |
| 174 | int32_t result; |
| 175 | + uint8_t boot_index; |
| 176 | |
| 177 | result = corstone1000_watchdog_init(); |
| 178 | if (result != ARM_DRIVER_OK) { |
| 179 | return 1; |
| 180 | } |
| 181 | |
| 182 | -#ifndef TFM_S_REG_TEST |
| 183 | - result = fill_bl2_flash_map_by_parsing_fips(BANK_0_PARTITION_OFFSET); |
| 184 | - if (result) { |
| 185 | + result = FLASH_DEV_NAME.Initialize(NULL); |
| 186 | + if (result != ARM_DRIVER_OK) { |
| 187 | return 1; |
| 188 | } |
| 189 | -#endif |
| 190 | |
| 191 | - result = FLASH_DEV_NAME.Initialize(NULL); |
| 192 | - if (result != ARM_DRIVER_OK) { |
| 193 | + plat_io_storage_init(); |
| 194 | + partition_init(PLATFORM_GPT_IMAGE); |
| 195 | + |
| 196 | + boot_index = bl2_get_boot_bank(); |
| 197 | + |
| 198 | + if (!fill_flash_map_with_tfm_data(boot_index) |
| 199 | + || !fill_flash_map_with_fip_data(boot_index)) { |
| 200 | + BOOT_LOG_ERR("Filling flash map has failed!"); |
| 201 | return 1; |
| 202 | } |
| 203 | |
| 204 | @@ -149,9 +194,6 @@ int32_t boot_platform_post_init(void) |
| 205 | } |
| 206 | #endif |
| 207 | |
| 208 | - bl2_get_boot_bank(&bank_offset); |
| 209 | - add_bank_offset_to_image_offset(bank_offset); |
| 210 | - |
| 211 | return 0; |
| 212 | } |
| 213 | |
| 214 | diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c |
| 215 | index e4f9da1ec3..1052bf9f00 100644 |
| 216 | --- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c |
| 217 | +++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c |
| 218 | @@ -836,34 +836,20 @@ void bl1_get_active_bl2_image(uint32_t *offset) |
| 219 | return; |
| 220 | } |
| 221 | |
| 222 | -void bl2_get_boot_bank(uint32_t *bank_offset) |
| 223 | +uint8_t bl2_get_boot_bank(void) |
| 224 | { |
| 225 | - uint32_t boot_index; |
| 226 | + uint8_t boot_index; |
| 227 | struct fwu_private_metadata priv_metadata; |
| 228 | - FWU_LOG_MSG("%s: enter\n\r", __func__); |
| 229 | - |
| 230 | + FWU_LOG_MSG("%s: enter", __func__); |
| 231 | if (fwu_metadata_init()) { |
| 232 | FWU_ASSERT(0); |
| 233 | } |
| 234 | - |
| 235 | if (private_metadata_read(&priv_metadata)) { |
| 236 | FWU_ASSERT(0); |
| 237 | } |
| 238 | - |
| 239 | boot_index = priv_metadata.boot_index; |
| 240 | - |
| 241 | - if (boot_index == BANK_0) { |
| 242 | - *bank_offset = BANK_0_PARTITION_OFFSET; |
| 243 | - } else if (boot_index == BANK_1) { |
| 244 | - *bank_offset = BANK_1_PARTITION_OFFSET; |
| 245 | - } else { |
| 246 | - FWU_ASSERT(0); |
| 247 | - } |
| 248 | - |
| 249 | - FWU_LOG_MSG("%s: exit: booting from bank = %u, offset = %x\n\r", __func__, |
| 250 | - boot_index, *bank_offset); |
| 251 | - |
| 252 | - return; |
| 253 | + FWU_LOG_MSG("%s: exit: booting from bank = %u", __func__, boot_index); |
| 254 | + return boot_index; |
| 255 | } |
| 256 | |
| 257 | static void disable_host_ack_timer(void) |
| 258 | diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h |
| 259 | index eb8320ed8a..701f205583 100644 |
| 260 | --- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h |
| 261 | +++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h |
| 262 | @@ -45,7 +45,7 @@ enum fwu_agent_error_t corstone1000_fwu_flash_image(void); |
| 263 | enum fwu_agent_error_t corstone1000_fwu_host_ack(void); |
| 264 | |
| 265 | void bl1_get_active_bl2_image(uint32_t *bank_offset); |
| 266 | -void bl2_get_boot_bank(uint32_t *bank_offset); |
| 267 | +uint8_t bl2_get_boot_bank(void); |
| 268 | |
| 269 | /* When in trial state, start the timer for host to respond. |
| 270 | * Diable timer when host responds back either by calling |
| 271 | diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h |
| 272 | index 347c91acbb..c5cf94a52c 100644 |
| 273 | --- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h |
| 274 | +++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h |
| 275 | @@ -32,7 +32,7 @@ |
| 276 | #define SRAM_BASE (0x30000000) |
| 277 | #define SRAM_SIZE (0x80000) /* 512 KB */ |
| 278 | |
| 279 | -#define BL2_DATA_GAP_SIZE (0x09000) /* 36 KB */ |
| 280 | +#define BL2_DATA_GAP_SIZE (0x09800) /* 38 KB */ |
| 281 | |
| 282 | #define BL1_DATA_START (SRAM_BASE) |
| 283 | #define BL1_DATA_SIZE (0x10000) /* 64 KiB*/ |
| 284 | diff --git a/platform/ext/target/arm/corstone1000/platform.c b/platform/ext/target/arm/corstone1000/platform.c |
| 285 | index 908b66b7ac..6add0d7e1b 100644 |
| 286 | --- a/platform/ext/target/arm/corstone1000/platform.c |
| 287 | +++ b/platform/ext/target/arm/corstone1000/platform.c |
| 288 | @@ -5,16 +5,95 @@ |
| 289 | * |
| 290 | */ |
| 291 | |
| 292 | +#include "stdint.h" |
| 293 | + |
| 294 | +#include "Driver_Flash.h" |
| 295 | +#include "flash_layout.h" |
| 296 | + |
| 297 | +#include "io_driver.h" |
| 298 | +#include "io_flash.h" |
| 299 | +#include "io_storage.h" |
| 300 | + |
| 301 | #include "platform.h" |
| 302 | |
| 303 | -#include <stdint.h> |
| 304 | +#define PLAT_LOG_MODULE_NAME "platform" |
| 305 | +#include "platform_log.h" |
| 306 | + |
| 307 | +typedef struct { |
| 308 | + uintptr_t dev_handle; |
| 309 | + uintptr_t image_spec; |
| 310 | +} platform_image_source_t; |
| 311 | + |
| 312 | +extern ARM_DRIVER_FLASH FLASH_DEV_NAME; |
| 313 | + |
| 314 | +static io_dev_connector_t *flash_dev_con; |
| 315 | +static uint8_t local_block_flash[FLASH_SECTOR_SIZE]; |
| 316 | +static io_flash_dev_spec_t flash_dev_spec = { |
| 317 | + .buffer = local_block_flash, |
| 318 | + .bufferlen = FLASH_SECTOR_SIZE, |
| 319 | + .base_addr = FLASH_BASE_ADDRESS, |
| 320 | + .flash_driver = &FLASH_DEV_NAME, |
| 321 | +}; |
| 322 | +static io_block_spec_t flash_spec = { |
| 323 | + .offset = FLASH_BASE_ADDRESS, |
| 324 | + .length = FLASH_TOTAL_SIZE |
| 325 | +}; |
| 326 | + |
| 327 | +static platform_image_source_t platform_image_source[] = { |
| 328 | + [PLATFORM_GPT_IMAGE] = { |
| 329 | + .dev_handle = NULL, |
| 330 | + .image_spec = &flash_spec, |
| 331 | + } |
| 332 | +}; |
| 333 | + |
| 334 | +/* Initialize io storage of the platform */ |
| 335 | +int32_t plat_io_storage_init(void) |
| 336 | +{ |
| 337 | + int rc = -1; |
| 338 | + uintptr_t flash_dev_handle = NULL; |
| 339 | + uintptr_t flash_handle = NULL; |
| 340 | + |
| 341 | + rc = register_io_dev_flash((const io_dev_connector_t **) &flash_dev_con); |
| 342 | + if (rc != 0) { |
| 343 | + ERROR("Failed to register io flash rc: %d", rc); |
| 344 | + return rc; |
| 345 | + } |
| 346 | + |
| 347 | + rc = io_dev_open(flash_dev_con, (const uintptr_t)&flash_dev_spec, &flash_dev_handle); |
| 348 | + if (rc != 0) { |
| 349 | + ERROR("Failed to open io flash dev rc: %d", rc); |
| 350 | + return rc; |
| 351 | + } |
| 352 | + |
| 353 | + VERBOSE("Flash_dev_handle = %p",flash_dev_handle); |
| 354 | + |
| 355 | + rc = io_open(flash_dev_handle, (const uintptr_t)&flash_spec, &flash_handle); |
| 356 | + if (rc != 0) { |
| 357 | + ERROR("Failed to open io flash rc: %d", rc); |
| 358 | + return rc; |
| 359 | + } |
| 360 | + |
| 361 | + VERBOSE("Flash_handle = %p",flash_handle); |
| 362 | + |
| 363 | + rc = io_close(flash_handle); |
| 364 | + if (rc != 0) { |
| 365 | + ERROR("Failed to close io flash rc: %d", rc); |
| 366 | + return rc; |
| 367 | + } |
| 368 | + /* Update the platform image source that uses the flash with dev handles */ |
| 369 | + platform_image_source[PLATFORM_GPT_IMAGE].dev_handle = flash_dev_handle; |
| 370 | + |
| 371 | + return rc; |
| 372 | +} |
| 373 | |
| 374 | /* Return an IO device handle and specification which can be used to access |
| 375 | * an image. This has to be implemented for the GPT parser. */ |
| 376 | int32_t plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, |
| 377 | uintptr_t *image_spec) { |
| 378 | - (void)image_id; |
| 379 | - *dev_handle = NULL; |
| 380 | - *image_spec = NULL; |
| 381 | + if (image_id >= PLATFORM_IMAGE_COUNT) { |
| 382 | + return -1; |
| 383 | + } |
| 384 | + *dev_handle = platform_image_source[image_id].dev_handle; |
| 385 | + *image_spec = platform_image_source[image_id].image_spec; |
| 386 | return 0; |
| 387 | } |
| 388 | diff --git a/platform/ext/target/arm/corstone1000/platform.h b/platform/ext/target/arm/corstone1000/platform.h |
| 389 | index 250f9cd9f5..894f5e3090 100644 |
| 390 | --- a/platform/ext/target/arm/corstone1000/platform.h |
| 391 | +++ b/platform/ext/target/arm/corstone1000/platform.h |
| 392 | @@ -8,6 +8,16 @@ |
| 393 | #ifndef __PLATFORM_H__ |
| 394 | #define __PLATFORM_H__ |
| 395 | |
| 396 | +typedef enum { |
| 397 | + PLATFORM_GPT_IMAGE = 0, |
| 398 | + PLATFORM_IMAGE_COUNT, |
| 399 | +}platform_image_id_t; |
| 400 | + |
| 401 | +/* Initialize io storage of the platform */ |
| 402 | +int32_t plat_io_storage_init(void); |
| 403 | + |
| 404 | +/* Return an IO device handle and specification which can be used to access |
| 405 | + * an image. This has to be implemented for the GPT parser. */ |
| 406 | int32_t plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, |
| 407 | uintptr_t *image_spec); |
| 408 | |
| 409 | -- |
| 410 | 2.25.1 |
| 411 | |