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gerrit.openbmc.org / openbmc / openbmc / 79e48917f5bc3eb9901dd1c936da14a984aaf840 / . / meta-openbmc-machines / meta-openpower / meta-ibm / meta-witherspoon / recipes-phosphor / sensors / phosphor-hwmon% / obmc / hwmon / gpio-fsi / cfam@0,0 / hub@3400 / cfam@1,0 / sbefifo@2400 / occ@2 / occ-hwmon@2.conf
blob: 338bd48e583b41e5ae8a5a617059a0043dab84c4 [file] [log] [blame]
Andrew Geissler1ff6ff12017-06-12 14:40:56 -0500[diff] [blame]1MODE_temp1 = "label"
2MODE_temp2 = "label"
3MODE_temp3 = "label"
4MODE_temp4 = "label"
5MODE_temp5 = "label"
6MODE_temp6 = "label"
7MODE_temp7 = "label"
8MODE_temp8 = "label"
9MODE_temp9 = "label"
10MODE_temp10 = "label"
11MODE_temp11 = "label"
12MODE_temp12 = "label"
13MODE_temp13 = "label"
14MODE_temp14 = "label"
15MODE_temp15 = "label"
16MODE_temp16 = "label"
17MODE_temp17 = "label"
18MODE_temp18 = "label"
19MODE_temp19 = "label"
20MODE_temp20 = "label"
21MODE_temp21 = "label"
22MODE_temp22 = "label"
23MODE_temp23 = "label"
24MODE_temp24 = "label"
25MODE_temp25 = "label"
26MODE_temp26 = "label"
27MODE_temp27 = "label"
28MODE_temp28 = "label"
29MODE_temp29 = "label"
30MODE_temp30 = "label"
31MODE_temp31 = "label"
32MODE_temp32 = "label"
Matt Spinler79e48912017-11-28 10:38:45 -0600[diff] [blame^]33MODE_temp33 = "label"
34MODE_temp34 = "label"
35MODE_temp35 = "label"
36MODE_temp36 = "label"
37MODE_temp37 = "label"
38MODE_temp38 = "label"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]39
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]40LABEL_temp91 = "p1_core0_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]41WARNHI_temp91 = "78000"
42WARNLO_temp91 = "0"
43CRITHI_temp91 = "83000"
44CRITLO_temp91 = "0"
45
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]46LABEL_temp94 = "p1_core1_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]47WARNHI_temp94 = "78000"
48WARNLO_temp94 = "0"
49CRITHI_temp94 = "83000"
50CRITLO_temp94 = "0"
51
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]52LABEL_temp97 = "p1_core2_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]53WARNHI_temp97 = "78000"
54WARNLO_temp97 = "0"
55CRITHI_temp97 = "83000"
56CRITLO_temp97 = "0"
57
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]58LABEL_temp100 = "p1_core3_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]59WARNHI_temp100 = "78000"
60WARNLO_temp100 = "0"
61CRITHI_temp100 = "83000"
62CRITLO_temp100 = "0"
63
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]64LABEL_temp103 = "p1_core4_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]65WARNHI_temp103 = "78000"
66WARNLO_temp103 = "0"
67CRITHI_temp103 = "83000"
68CRITLO_temp103 = "0"
69
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]70LABEL_temp106 = "p1_core5_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]71WARNHI_temp106 = "78000"
72WARNLO_temp106 = "0"
73CRITHI_temp106 = "83000"
74CRITLO_temp106 = "0"
75
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]76LABEL_temp109 = "p1_core6_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]77WARNHI_temp109 = "78000"
78WARNLO_temp109 = "0"
79CRITHI_temp109 = "83000"
80CRITLO_temp109 = "0"
81
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]82LABEL_temp112 = "p1_core7_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]83WARNHI_temp112 = "78000"
84WARNLO_temp112 = "0"
85CRITHI_temp112 = "83000"
86CRITLO_temp112 = "0"
87
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]88LABEL_temp115 = "p1_core8_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]89WARNHI_temp115 = "78000"
90WARNLO_temp115 = "0"
91CRITHI_temp115 = "83000"
92CRITLO_temp115 = "0"
93
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]94LABEL_temp118 = "p1_core9_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]95WARNHI_temp118 = "78000"
96WARNLO_temp118 = "0"
97CRITHI_temp118 = "83000"
98CRITLO_temp118 = "0"
99
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]100LABEL_temp121 = "p1_core10_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]101WARNHI_temp121 = "78000"
102WARNLO_temp121 = "0"
103CRITHI_temp121 = "83000"
104CRITLO_temp121 = "0"
105
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]106LABEL_temp124 = "p1_core11_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]107WARNHI_temp124 = "78000"
108WARNLO_temp124 = "0"
109CRITHI_temp124 = "83000"
110CRITLO_temp124 = "0"
111
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]112LABEL_temp127 = "p1_core12_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]113WARNHI_temp127 = "78000"
114WARNLO_temp127 = "0"
115CRITHI_temp127 = "83000"
116CRITLO_temp127 = "0"
117
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]118LABEL_temp130 = "p1_core13_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]119WARNHI_temp130 = "78000"
120WARNLO_temp130 = "0"
121CRITHI_temp130 = "83000"
122CRITLO_temp130 = "0"
123
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]124LABEL_temp133 = "p1_core14_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]125WARNHI_temp133 = "78000"
126WARNLO_temp133 = "0"
127CRITHI_temp133 = "83000"
128CRITLO_temp133 = "0"
129
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]130LABEL_temp136 = "p1_core15_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]131WARNHI_temp136 = "78000"
132WARNLO_temp136 = "0"
133CRITHI_temp136 = "83000"
134CRITLO_temp136 = "0"
135
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]136LABEL_temp139 = "p1_core16_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]137WARNHI_temp139 = "78000"
138WARNLO_temp139 = "0"
139CRITHI_temp139 = "83000"
140CRITLO_temp139 = "0"
141
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]142LABEL_temp142 = "p1_core17_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]143WARNHI_temp142 = "78000"
144WARNLO_temp142 = "0"
145CRITHI_temp142 = "83000"
146CRITLO_temp142 = "0"
147
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]148LABEL_temp145 = "p1_core18_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]149WARNHI_temp145 = "78000"
150WARNLO_temp145 = "0"
151CRITHI_temp145 = "83000"
152CRITLO_temp145 = "0"
153
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]154LABEL_temp148 = "p1_core19_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]155WARNHI_temp148 = "78000"
156WARNLO_temp148 = "0"
157CRITHI_temp148 = "83000"
158CRITLO_temp148 = "0"
159
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]160LABEL_temp151 = "p1_core20_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]161WARNHI_temp151 = "78000"
162WARNLO_temp151 = "0"
163CRITHI_temp151 = "83000"
164CRITLO_temp151 = "0"
165
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]166LABEL_temp154 = "p1_core21_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]167WARNHI_temp154 = "78000"
168WARNLO_temp154 = "0"
169CRITHI_temp154 = "83000"
170CRITLO_temp154 = "0"
171
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]172LABEL_temp157 = "p1_core22_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]173WARNHI_temp157 = "78000"
174WARNLO_temp157 = "0"
175CRITHI_temp157 = "83000"
176CRITLO_temp157 = "0"
177
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]178LABEL_temp160 = "p1_core23_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]179WARNHI_temp160 = "78000"
180WARNLO_temp160 = "0"
181CRITHI_temp160 = "83000"
182CRITLO_temp160 = "0"
183
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]184LABEL_temp181 = "dimm8_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]185WARNHI_temp181 = "78000"
186WARNLO_temp181 = "0"
187CRITHI_temp181 = "83000"
188CRITLO_temp181 = "0"
189
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]190LABEL_temp183 = "dimm9_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]191WARNHI_temp183 = "78000"
192WARNLO_temp183 = "0"
193CRITHI_temp183 = "83000"
194CRITLO_temp183 = "0"
195
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]196LABEL_temp185 = "dimm10_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]197WARNHI_temp185 = "78000"
198WARNLO_temp185 = "0"
199CRITHI_temp185 = "83000"
200CRITLO_temp185 = "0"
201
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]202LABEL_temp187 = "dimm11_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]203WARNHI_temp187 = "78000"
204WARNLO_temp187 = "0"
205CRITHI_temp187 = "83000"
206CRITLO_temp187 = "0"
207
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]208LABEL_temp189 = "dimm12_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]209WARNHI_temp189 = "78000"
210WARNLO_temp189 = "0"
211CRITHI_temp189 = "83000"
212CRITLO_temp189 = "0"
213
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]214LABEL_temp191 = "dimm13_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]215WARNHI_temp191 = "78000"
216WARNLO_temp191 = "0"
217CRITHI_temp191 = "83000"
218CRITLO_temp191 = "0"
219
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]220LABEL_temp193 = "dimm14_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]221WARNHI_temp193 = "78000"
222WARNLO_temp193 = "0"
223CRITHI_temp193 = "83000"
224CRITLO_temp193 = "0"
225
Andrew Geisslerb871cc82017-05-26 16:39:03 -0500[diff] [blame]226LABEL_temp195 = "dimm15_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]227WARNHI_temp195 = "78000"
228WARNLO_temp195 = "0"
229CRITHI_temp195 = "83000"
230CRITLO_temp195 = "0"
231
Matthew Barthb4c018d2017-09-11 13:00:36 -0500[diff] [blame]232LABEL_temp207 = "gpu3_core_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]233WARNHI_temp207 = "76000"
234WARNLO_temp207 = "0"
235CRITHI_temp207 = "81000"
236CRITLO_temp207 = "0"
237
Matthew Barthb4c018d2017-09-11 13:00:36 -0500[diff] [blame]238LABEL_temp208 = "gpu3_mem_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]239WARNHI_temp208 = "78000"
240WARNLO_temp208 = "0"
241CRITHI_temp208 = "83000"
242CRITLO_temp208 = "0"
243
Matthew Barthb4c018d2017-09-11 13:00:36 -0500[diff] [blame]244LABEL_temp210 = "gpu4_core_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]245WARNHI_temp210 = "76000"
246WARNLO_temp210 = "0"
247CRITHI_temp210 = "81000"
248CRITLO_temp210 = "0"
249
Matthew Barthb4c018d2017-09-11 13:00:36 -0500[diff] [blame]250LABEL_temp211 = "gpu4_mem_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]251WARNHI_temp211 = "78000"
252WARNLO_temp211 = "0"
253CRITHI_temp211 = "83000"
254CRITLO_temp211 = "0"
255
Matthew Barthb4c018d2017-09-11 13:00:36 -0500[diff] [blame]256LABEL_temp213 = "gpu5_core_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]257WARNHI_temp213 = "76000"
258WARNLO_temp213 = "0"
259CRITHI_temp213 = "81000"
260CRITLO_temp213 = "0"
261
Matthew Barthb4c018d2017-09-11 13:00:36 -0500[diff] [blame]262LABEL_temp214 = "gpu5_mem_temp"
Matt Spinler92385082017-10-13 11:11:28 -0500[diff] [blame]263WARNHI_temp214 = "78000"
264WARNLO_temp214 = "0"
265CRITHI_temp214 = "83000"
Matt Spinler79e48912017-11-28 10:38:45 -0600[diff] [blame^]266CRITLO_temp214 = "0"