| Andrew Geissler | 7e0e3c0 | 2022-02-25 20:34:39 +0000 | [diff] [blame^] | 1 | From 00ae1ee97ad3ad0624798b28c6bab94a19b3ef39 Mon Sep 17 00:00:00 2001 |
| 2 | From: Zhenhua Luo <zhenhua.luo@nxp.com> |
| 3 | Date: Sat, 11 Jun 2016 22:08:29 -0500 |
| 4 | Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic |
| 5 | |
| 6 | The wait mnemonic for ppc targets is incorrectly assembled into 0x7c00003c due |
| 7 | to duplicated address definition with waitasec instruction. The issue causes |
| 8 | kernel boot calltrace for ppc targets when wait instruction is executed. |
| 9 | |
| 10 | Upstream-Status: Pending |
| 11 | Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com> |
| 12 | --- |
| 13 | opcodes/ppc-opc.c | 4 +--- |
| 14 | 1 file changed, 1 insertion(+), 3 deletions(-) |
| 15 | |
| 16 | diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c |
| 17 | index a424dd924de..406d5b60917 100644 |
| 18 | --- a/opcodes/ppc-opc.c |
| 19 | +++ b/opcodes/ppc-opc.c |
| 20 | @@ -6378,8 +6378,6 @@ const struct powerpc_opcode powerpc_opcodes[] = { |
| 21 | {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}}, |
| 22 | {"waitrsv", XWCPL(31,30,1,0),0xffffffff, POWER10, EXT, {0}}, |
| 23 | {"pause_short", XWCPL(31,30,2,0),0xffffffff, POWER10, EXT, {0}}, |
| 24 | -{"wait", X(31,30), XWCPL_MASK, POWER10, 0, {WC, PL}}, |
| 25 | -{"wait", X(31,30), XWC_MASK, POWER9, POWER10, {WC}}, |
| 26 | |
| 27 | {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, |
| 28 | |
| 29 | @@ -6433,7 +6431,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { |
| 30 | |
| 31 | {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}}, |
| 32 | {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}}, |
| 33 | -{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}}, |
| 34 | +{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|POWER9|POWER10, 0, {WC}}, |
| 35 | |
| 36 | {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}}, |
| 37 | |