Andrew Geissler | 87f5cff | 2022-09-30 13:13:31 -0500 | [diff] [blame] | 1 | From c0546e351f6d7ab50eb1de8cef1d0d167760fccc Mon Sep 17 00:00:00 2001 |
| 2 | From: Peter Korsgaard <peter@korsgaard.com> |
| 3 | Date: Mon, 27 Aug 2018 22:50:57 +0200 |
| 4 | Subject: [PATCH] bn_mul.h: fix x86 PIC inline ASM compilation with GCC < 5 |
| 5 | MIME-Version: 1.0 |
| 6 | Content-Type: text/plain; charset=UTF-8 |
| 7 | Content-Transfer-Encoding: 8bit |
| 8 | |
| 9 | Fixes #1910 |
| 10 | |
| 11 | With ebx added to the MULADDC_STOP clobber list to fix #1550, the inline |
| 12 | assembly fails to build with GCC < 5 in PIC mode with the following error: |
| 13 | |
| 14 | include/mbedtls/bn_mul.h:46:13: error: PIC register clobbered by ‘ebx’ in ‘asm’ |
| 15 | |
| 16 | This is because older GCC versions treated the x86 ebx register (which is |
| 17 | used for the GOT) as a fixed reserved register when building as PIC. |
| 18 | |
| 19 | This is fixed by an improved register allocator in GCC 5+. From the release |
| 20 | notes: |
| 21 | |
| 22 | Register allocation improvements: Reuse of the PIC hard register, instead of |
| 23 | using a fixed register, was implemented on x86/x86-64 targets. This |
| 24 | improves generated PIC code performance as more hard registers can be used. |
| 25 | |
| 26 | https://www.gnu.org/software/gcc/gcc-5/changes.html |
| 27 | |
| 28 | As a workaround, detect this situation and disable the inline assembly, |
| 29 | similar to the MULADDC_CANNOT_USE_R7 logic. |
| 30 | |
| 31 | Upstream-Status: Backport [https://github.com/Mbed-TLS/mbedtls/commit/c0546e351f6d7ab50eb1de8cef1d0d167760fccc] |
| 32 | Signed-off-by: Peter Korsgaard <peter@korsgaard.com> |
| 33 | --- |
| 34 | library/bn_mul.h | 18 +++++++++++++++++- |
| 35 | 1 file changed, 17 insertions(+), 1 deletion(-) |
| 36 | |
| 37 | --- a/third_party/openthread/repo/third_party/mbedtls/repo/include/mbedtls/bn_mul.h |
| 38 | +++ b/third_party/openthread/repo/third_party/mbedtls/repo/include/mbedtls/bn_mul.h |
| 39 | @@ -55,12 +55,28 @@ |
| 40 | ( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 ) |
| 41 | |
| 42 | /* |
| 43 | + * GCC < 5.0 treated the x86 ebx (which is used for the GOT) as a |
| 44 | + * fixed reserved register when building as PIC, leading to errors |
| 45 | + * like: bn_mul.h:46:13: error: PIC register clobbered by 'ebx' in 'asm' |
| 46 | + * |
| 47 | + * This is fixed by an improved register allocator in GCC 5+. From the |
| 48 | + * release notes: |
| 49 | + * Register allocation improvements: Reuse of the PIC hard register, |
| 50 | + * instead of using a fixed register, was implemented on x86/x86-64 |
| 51 | + * targets. This improves generated PIC code performance as more hard |
| 52 | + * registers can be used. |
| 53 | + */ |
| 54 | +#if defined(__GNUC__) && __GNUC__ < 5 && defined(__PIC__) |
| 55 | +#define MULADDC_CANNOT_USE_EBX |
| 56 | +#endif |
| 57 | + |
| 58 | +/* |
| 59 | * Disable use of the i386 assembly code below if option -O0, to disable all |
| 60 | * compiler optimisations, is passed, detected with __OPTIMIZE__ |
| 61 | * This is done as the number of registers used in the assembly code doesn't |
| 62 | * work with the -O0 option. |
| 63 | */ |
| 64 | -#if defined(__i386__) && defined(__OPTIMIZE__) |
| 65 | +#if defined(__i386__) && defined(__OPTIMIZE__) && !defined(MULADDC_CANNOT_USE_EBX) |
| 66 | |
| 67 | #define MULADDC_INIT \ |
| 68 | asm( \ |