Patrick Williams | 864cc43 | 2023-02-09 14:54:44 -0600 | [diff] [blame^] | 1 | From a9795b9aadcbc04ad0404badf722acb83ef0ab7b Mon Sep 17 00:00:00 2001 |
Andrew Geissler | 82c905d | 2020-04-13 13:39:40 -0500 | [diff] [blame] | 2 | From: Khem Raj <raj.khem@gmail.com> |
| 3 | Date: Thu, 31 Dec 2015 14:35:35 -0800 |
Andrew Geissler | d1e8949 | 2021-02-12 15:35:20 -0600 | [diff] [blame] | 4 | Subject: [PATCH] nativesdk-glibc: Allow 64 bit atomics for x86 |
Andrew Geissler | 82c905d | 2020-04-13 13:39:40 -0500 | [diff] [blame] | 5 | |
| 6 | The fix consist of allowing 64bit atomic ops for x86. |
| 7 | This should be safe for i586 and newer CPUs. |
| 8 | It also makes the synchronization more efficient. |
| 9 | |
| 10 | Upstream-Status: Inappropriate [OE-Specific] |
| 11 | |
| 12 | Signed-off-by: Juro Bystricky <juro.bystricky@intel.com> |
| 13 | Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> |
| 14 | Signed-off-by: Khem Raj <raj.khem@gmail.com> |
| 15 | --- |
Andrew Geissler | 7e0e3c0 | 2022-02-25 20:34:39 +0000 | [diff] [blame] | 16 | sysdeps/x86/atomic-machine.h | 7 +------ |
| 17 | 1 file changed, 1 insertion(+), 6 deletions(-) |
Andrew Geissler | 82c905d | 2020-04-13 13:39:40 -0500 | [diff] [blame] | 18 | |
| 19 | diff --git a/sysdeps/x86/atomic-machine.h b/sysdeps/x86/atomic-machine.h |
Patrick Williams | 864cc43 | 2023-02-09 14:54:44 -0600 | [diff] [blame^] | 20 | index 95663099e4..4d81efc51a 100644 |
Andrew Geissler | 82c905d | 2020-04-13 13:39:40 -0500 | [diff] [blame] | 21 | --- a/sysdeps/x86/atomic-machine.h |
| 22 | +++ b/sysdeps/x86/atomic-machine.h |
Patrick Williams | 92b42cb | 2022-09-03 06:53:57 -0500 | [diff] [blame] | 23 | @@ -26,19 +26,14 @@ |
Andrew Geissler | d1e8949 | 2021-02-12 15:35:20 -0600 | [diff] [blame] | 24 | #define LOCK_PREFIX "lock;" |
Andrew Geissler | 82c905d | 2020-04-13 13:39:40 -0500 | [diff] [blame] | 25 | |
| 26 | #define USE_ATOMIC_COMPILER_BUILTINS 1 |
| 27 | +# define __HAVE_64B_ATOMICS 1 |
| 28 | |
| 29 | #ifdef __x86_64__ |
| 30 | -# define __HAVE_64B_ATOMICS 1 |
| 31 | # define SP_REG "rsp" |
| 32 | # define SEG_REG "fs" |
| 33 | # define BR_CONSTRAINT "q" |
| 34 | # define IBR_CONSTRAINT "iq" |
| 35 | #else |
Andrew Geissler | 7e0e3c0 | 2022-02-25 20:34:39 +0000 | [diff] [blame] | 36 | -/* Since the Pentium, i386 CPUs have supported 64-bit atomics, but the |
| 37 | - i386 psABI supplement provides only 4-byte alignment for uint64_t |
| 38 | - inside structs, so it is currently not possible to use 64-bit |
| 39 | - atomics on this platform. */ |
Andrew Geissler | 82c905d | 2020-04-13 13:39:40 -0500 | [diff] [blame] | 40 | -# define __HAVE_64B_ATOMICS 0 |
| 41 | # define SP_REG "esp" |
| 42 | # define SEG_REG "gs" |
| 43 | # define BR_CONSTRAINT "r" |