| Andrew Geissler | 9347dd4 | 2023-03-03 12:38:41 -0600 | [diff] [blame^] | 1 | From bad32d3fc127a421be416b17e4f7d6d514f06abb Mon Sep 17 00:00:00 2001 |
| Brad Bishop | bec4ebc | 2022-08-03 09:55:16 -0400 | [diff] [blame] | 2 | From: Jaxson Han <jaxson.han@arm.com> |
| 3 | Date: Tue, 25 May 2021 07:25:00 +0100 |
| 4 | Subject: [PATCH] aarch64: Prepare for EL1 booting |
| 5 | |
| 6 | When booting from EL1, add a check and skip the init of |
| 7 | sctlr_el2 in jump_kernel |
| 8 | |
| 9 | Upstream-Status: Pending |
| 10 | Signed-off-by: Jaxson Han <jaxson.han@arm.com> |
| 11 | Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
| 12 | --- |
| 13 | arch/aarch64/boot.S | 6 +++++- |
| 14 | arch/aarch64/include/asm/cpu.h | 1 + |
| 15 | 2 files changed, 6 insertions(+), 1 deletion(-) |
| 16 | |
| 17 | diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S |
| Andrew Geissler | 9347dd4 | 2023-03-03 12:38:41 -0600 | [diff] [blame^] | 18 | index fab694e..5105b41 100644 |
| Brad Bishop | bec4ebc | 2022-08-03 09:55:16 -0400 | [diff] [blame] | 19 | --- a/arch/aarch64/boot.S |
| 20 | +++ b/arch/aarch64/boot.S |
| Andrew Geissler | 9347dd4 | 2023-03-03 12:38:41 -0600 | [diff] [blame^] | 21 | @@ -177,10 +177,14 @@ ASM_FUNC(jump_kernel) |
| Brad Bishop | bec4ebc | 2022-08-03 09:55:16 -0400 | [diff] [blame] | 22 | ldr x0, =SCTLR_EL1_KERNEL |
| 23 | msr sctlr_el1, x0 |
| 24 | |
| 25 | + mrs x0, CurrentEL |
| 26 | + cmp x0, #CURRENTEL_EL2 |
| 27 | + b.lt 1f |
| 28 | + |
| 29 | ldr x0, =SCTLR_EL2_KERNEL |
| 30 | msr sctlr_el2, x0 |
| 31 | |
| 32 | - cpuid x0, x1 |
| 33 | +1: cpuid x0, x1 |
| 34 | bl find_logical_id |
| 35 | bl setup_stack // Reset stack pointer |
| 36 | |
| 37 | diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h |
| Andrew Geissler | 9347dd4 | 2023-03-03 12:38:41 -0600 | [diff] [blame^] | 38 | index 49d3f86..3767da3 100644 |
| Brad Bishop | bec4ebc | 2022-08-03 09:55:16 -0400 | [diff] [blame] | 39 | --- a/arch/aarch64/include/asm/cpu.h |
| 40 | +++ b/arch/aarch64/include/asm/cpu.h |
| 41 | @@ -11,6 +11,7 @@ |
| 42 | |
| 43 | #define MPIDR_ID_BITS 0xff00ffffff |
| 44 | |
| 45 | +#define CURRENTEL_EL2 (2 << 2) |
| 46 | #define CURRENTEL_EL3 (3 << 2) |
| 47 | |
| 48 | /* |