| Andrew Geissler | 82c905d | 2020-04-13 13:39:40 -0500 | [diff] [blame] | 1 | From ef4ad1cb9ff1b5a871ffa792a71b3ad6d14eb3dc Mon Sep 17 00:00:00 2001 |
| 2 | From: Zhenhua Luo <zhenhua.luo@nxp.com> |
| 3 | Date: Sat, 11 Jun 2016 22:08:29 -0500 |
| 4 | Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic |
| 5 | |
| 6 | Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com> |
| 7 | |
| 8 | Upstream-Status: Pending |
| 9 | --- |
| 10 | opcodes/ppc-opc.c | 3 +-- |
| 11 | 1 file changed, 1 insertion(+), 2 deletions(-) |
| 12 | |
| 13 | diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c |
| 14 | index 7ef91d819b..145953d3c4 100644 |
| 15 | --- a/opcodes/ppc-opc.c |
| 16 | +++ b/opcodes/ppc-opc.c |
| 17 | @@ -5709,7 +5709,6 @@ const struct powerpc_opcode powerpc_opcodes[] = { |
| 18 | {"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, |
| 19 | |
| 20 | {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}}, |
| 21 | -{"wait", X(31,30), XWC_MASK, POWER9, 0, {WC}}, |
| 22 | |
| 23 | {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, |
| 24 | |
| 25 | @@ -5763,7 +5762,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { |
| 26 | |
| 27 | {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, 0, {0}}, |
| 28 | {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, 0, {0}}, |
| 29 | -{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}}, |
| 30 | +{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|POWER9, 0, {WC}}, |
| 31 | |
| 32 | {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}}, |
| 33 | |