Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 1 | #!/bin/bash |
| 2 | |
Thang Q. Nguyen | dde1fed | 2021-11-04 08:30:27 +0000 | [diff] [blame] | 3 | # shellcheck source=/dev/null |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 4 | source /usr/sbin/gpio-lib.sh |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 5 | source /usr/sbin/gpio-defs.sh |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 6 | |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 7 | # Configure to boot from MAIN SPI-HOST |
| 8 | gpio_configure_output "$SPI0_BACKUP_SEL" 0 |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 9 | |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 10 | gpio_configure_input "$S0_I2C9_ALERT_L" |
| 11 | gpio_configure_input "$S1_I2C9_ALERT_L" |
| 12 | gpio_configure_input "$GPIO_BMC_VGA_FRONT_PRES_L" |
| 13 | gpio_configure_input "$GPIO_S0_VRHOT_L" |
| 14 | gpio_configure_input "$GPIO_S1_VRHOT_L" |
| 15 | gpio_configure_output "$BMC_VGA_SEL" 1 |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 16 | |
| 17 | # ======================================================= |
| 18 | # Below GPIOs are controlled by other services so just |
| 19 | # initialize in A/C power only. |
Thang Q. Nguyen | ed81813 | 2022-02-22 10:48:32 +0000 | [diff] [blame] | 20 | bootstatus=$(cat /sys/class/watchdog/watchdog0/bootstatus) |
| 21 | if [ "$bootstatus" == '32' ]; then |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 22 | gpio_configure_output "$BMC_GPIOR2_EXT_HIGHTEMP_L" 1 |
| 23 | gpio_configure_output "$GPIO_BMC_VR_PMBUS_SEL_L" 1 |
| 24 | gpio_configure_output "$GPIO_BMC_I2C6_RESET_L" 1 |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 25 | |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 26 | # Initialize OCP register |
| 27 | gpio_configure_output "$OCP_MAIN_PWREN" 0 |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 28 | |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 29 | # Configure SPI-NOR/EEPROM switching |
| 30 | gpio_configure_output "$SPI0_PROGRAM_SEL" 0 |
| 31 | gpio_configure_output "$BMC_I2C_BACKUP_SEL" 1 |
| 32 | gpio_configure_output "$SPI0_BACKUP_SEL" 0 |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 33 | |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 34 | # Initialize BMC_SYS_PSON_L, SHD_REQ_L, BMC_SYSRESET_L |
| 35 | gpio_configure_output "$SYS_PSON_L" 1 |
| 36 | gpio_configure_output "$S0_SHD_REQ_L" 1 |
| 37 | gpio_configure_output "$S0_SYSRESET_L" 1 |
| 38 | gpio_configure_output "$S1_SYSRESET_L" 1 |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 39 | |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 40 | # RTC Lock, SPECIAL_BOOT |
| 41 | gpio_configure_output "$RTC_LOCK" 0 |
| 42 | gpio_configure_output "$S0_SPECIAL_BOOT" 0 |
| 43 | gpio_configure_output "$S1_SPECIAL_BOOT" 0 |
Thang Q. Nguyen | 7d0f84a | 2021-09-23 06:47:52 +0000 | [diff] [blame] | 44 | fi |
Thang Q. Nguyen | bddca60 | 2022-07-29 14:45:33 +0700 | [diff] [blame^] | 45 | |
| 46 | gpio_configure_output "$BMC_READY" 1 |