| Andrew Geissler | 6ce62a2 | 2020-11-30 19:58:47 -0600 | [diff] [blame] | 1 | From dbcf296f84e5cef6a3ff0f1c469a4508f1e0fb15 Mon Sep 17 00:00:00 2001 |
| 2 | From: Khem Raj <raj.khem@gmail.com> |
| 3 | Date: Sun, 15 Nov 2020 15:32:39 -0800 |
| 4 | Subject: [PATCH] numpy/core: Define RISCV-32 support |
| 5 | |
| 6 | Helps compile on riscv32 |
| 7 | |
| 8 | Upstream-Status: Submitted [https://github.com/numpy/numpy/pull/17780] |
| 9 | Signed-off-by: Khem Raj <raj.khem@gmail.com> |
| 10 | --- |
| 11 | numpy/core/include/numpy/npy_cpu.h | 9 +++++++-- |
| 12 | numpy/core/include/numpy/npy_endian.h | 1 + |
| 13 | 2 files changed, 8 insertions(+), 2 deletions(-) |
| 14 | |
| 15 | diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h |
| 16 | index 4dbf9d84e..bc41a7eda 100644 |
| 17 | --- a/numpy/core/include/numpy/npy_cpu.h |
| 18 | +++ b/numpy/core/include/numpy/npy_cpu.h |
| 19 | @@ -18,6 +18,7 @@ |
| 20 | * NPY_CPU_ARCEL |
| 21 | * NPY_CPU_ARCEB |
| 22 | * NPY_CPU_RISCV64 |
| 23 | + * NPY_CPU_RISCV32 |
| 24 | * NPY_CPU_WASM |
| 25 | */ |
| 26 | #ifndef _NPY_CPUARCH_H_ |
| 27 | @@ -100,8 +101,12 @@ |
| 28 | #define NPY_CPU_ARCEL |
| 29 | #elif defined(__arc__) && defined(__BIG_ENDIAN__) |
| 30 | #define NPY_CPU_ARCEB |
| 31 | -#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64 |
| 32 | - #define NPY_CPU_RISCV64 |
| 33 | +#elif defined(__riscv) |
| 34 | + #if __riscv_xlen == 64 |
| 35 | + #define NPY_CPU_RISCV64 |
| 36 | + #elif __riscv_xlen == 32 |
| 37 | + #define NPY_CPU_RISCV32 |
| 38 | + #endif |
| 39 | #elif defined(__EMSCRIPTEN__) |
| 40 | /* __EMSCRIPTEN__ is defined by emscripten: an LLVM-to-Web compiler */ |
| 41 | #define NPY_CPU_WASM |
| 42 | diff --git a/numpy/core/include/numpy/npy_endian.h b/numpy/core/include/numpy/npy_endian.h |
| 43 | index aa367a002..d59484573 100644 |
| 44 | --- a/numpy/core/include/numpy/npy_endian.h |
| 45 | +++ b/numpy/core/include/numpy/npy_endian.h |
| 46 | @@ -49,6 +49,7 @@ |
| 47 | || defined(NPY_CPU_PPC64LE) \ |
| 48 | || defined(NPY_CPU_ARCEL) \ |
| 49 | || defined(NPY_CPU_RISCV64) \ |
| 50 | + || defined(NPY_CPU_RISCV32) \ |
| 51 | || defined(NPY_CPU_WASM) |
| 52 | #define NPY_BYTE_ORDER NPY_LITTLE_ENDIAN |
| 53 | #elif defined(NPY_CPU_PPC) \ |
| 54 | -- |
| 55 | 2.29.2 |
| 56 | |