Andrew Geissler | e34f896 | 2021-04-15 15:53:51 -0500 | [diff] [blame^] | 1 | From cb9e9b5b1ad05dd9de07a65ee7147cdb3433746a Mon Sep 17 00:00:00 2001 |
| 2 | From: Naveen Saini <naveen.kumar.saini@intel.com> |
| 3 | Date: Fri, 9 Apr 2021 15:41:35 +0800 |
| 4 | Subject: [PATCH] CMakeLists.txt: exclude riscv64 & riscv32 |
| 5 | |
| 6 | Upstream-Status: Pending |
| 7 | |
| 8 | Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com> |
| 9 | --- |
| 10 | src/tbb/CMakeLists.txt | 2 +- |
| 11 | src/tbbmalloc/CMakeLists.txt | 2 +- |
| 12 | 2 files changed, 2 insertions(+), 2 deletions(-) |
| 13 | |
| 14 | diff --git a/src/tbb/CMakeLists.txt b/src/tbb/CMakeLists.txt |
| 15 | index a6edb6ad..4f261813 100644 |
| 16 | --- a/src/tbb/CMakeLists.txt |
| 17 | +++ b/src/tbb/CMakeLists.txt |
| 18 | @@ -55,7 +55,7 @@ target_compile_definitions(tbb |
| 19 | PRIVATE |
| 20 | __TBB_BUILD) |
| 21 | |
| 22 | -if (NOT ("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "(armv7-a|aarch64|mips|arm64)" OR |
| 23 | +if (NOT ("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "(armv7-a|aarch64|mips|arm64|riscv64|riscv32)" OR |
| 24 | "${CMAKE_OSX_ARCHITECTURES}" MATCHES "arm64" OR |
| 25 | WINDOWS_STORE OR |
| 26 | TBB_WINDOWS_DRIVER)) |
| 27 | diff --git a/src/tbbmalloc/CMakeLists.txt b/src/tbbmalloc/CMakeLists.txt |
| 28 | index de7ca7ea..31e854fe 100644 |
| 29 | --- a/src/tbbmalloc/CMakeLists.txt |
| 30 | +++ b/src/tbbmalloc/CMakeLists.txt |
| 31 | @@ -28,7 +28,7 @@ target_compile_definitions(tbbmalloc |
| 32 | PRIVATE |
| 33 | __TBBMALLOC_BUILD) |
| 34 | |
| 35 | -if (NOT ("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "(armv7-a|aarch64|mips|arm64)" OR |
| 36 | +if (NOT ("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "(armv7-a|aarch64|mips|arm64|riscv64|riscv32)" OR |
| 37 | "${CMAKE_OSX_ARCHITECTURES}" MATCHES "arm64" OR |
| 38 | WINDOWS_STORE OR |
| 39 | TBB_WINDOWS_DRIVER)) |
| 40 | -- |
| 41 | 2.17.1 |
| 42 | |