Andrew Geissler | ea144b03 | 2023-01-27 16:03:57 -0600 | [diff] [blame^] | 1 | From d662633cb8e90144969790b8abf047a3f777e47a Mon Sep 17 00:00:00 2001 |
| 2 | From: Rui Miguel Silva <rui.silva@linaro.org> |
| 3 | Date: Wed, 30 Nov 2022 15:37:22 +0000 |
| 4 | Subject: [PATCH 20/25] arm:corstone1000: add mmc for fvp |
| 5 | |
| 6 | Enable support mmc/sdcard for the corstone1000 FVP. |
| 7 | |
| 8 | Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com> |
| 9 | Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> |
| 10 | Upstream-Status: Pending [Not submitted to upstream yet] |
| 11 | --- |
| 12 | board/armltd/corstone1000/corstone1000.c | 28 +++++++++++++++++++----- |
| 13 | configs/corstone1000_defconfig | 8 ++++++- |
| 14 | include/configs/corstone1000.h | 4 +++- |
| 15 | 3 files changed, 32 insertions(+), 8 deletions(-) |
| 16 | |
| 17 | diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c |
| 18 | index 76816f8f4e..d6ca6e8961 100644 |
| 19 | --- a/board/armltd/corstone1000/corstone1000.c |
| 20 | +++ b/board/armltd/corstone1000/corstone1000.c |
| 21 | @@ -38,19 +38,35 @@ static struct mm_region corstone1000_mem_map[] = { |
| 22 | }, { |
| 23 | /* USB */ |
| 24 | .virt = 0x40200000UL, |
| 25 | - .phys = 0x40200000UL, |
| 26 | + .phys = 0x40200000UL, |
| 27 | + .size = 0x00100000UL, |
| 28 | + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 29 | + PTE_BLOCK_NON_SHARE | |
| 30 | + PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 31 | + }, { |
| 32 | + /* MMC0 */ |
| 33 | + .virt = 0x40300000UL, |
| 34 | + .phys = 0x40300000UL, |
| 35 | .size = 0x00100000UL, |
| 36 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 37 | - PTE_BLOCK_NON_SHARE | |
| 38 | - PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 39 | + PTE_BLOCK_NON_SHARE | |
| 40 | + PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 41 | }, { |
| 42 | /* ethernet */ |
| 43 | .virt = 0x40100000UL, |
| 44 | - .phys = 0x40100000UL, |
| 45 | + .phys = 0x40100000UL, |
| 46 | + .size = 0x00100000UL, |
| 47 | + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 48 | + PTE_BLOCK_NON_SHARE | |
| 49 | + PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 50 | + }, { |
| 51 | + /* MMC1 */ |
| 52 | + .virt = 0x50000000UL, |
| 53 | + .phys = 0x50000000UL, |
| 54 | .size = 0x00100000UL, |
| 55 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 56 | - PTE_BLOCK_NON_SHARE | |
| 57 | - PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 58 | + PTE_BLOCK_NON_SHARE | |
| 59 | + PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 60 | }, { |
| 61 | /* OCVM */ |
| 62 | .virt = 0x80000000UL, |
| 63 | diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig |
| 64 | index c72d027711..336da67a8d 100644 |
| 65 | --- a/configs/corstone1000_defconfig |
| 66 | +++ b/configs/corstone1000_defconfig |
| 67 | @@ -40,7 +40,13 @@ CONFIG_VERSION_VARIABLE=y |
| 68 | CONFIG_NET_RANDOM_ETHADDR=y |
| 69 | CONFIG_REGMAP=y |
| 70 | CONFIG_MISC=y |
| 71 | -# CONFIG_MMC is not set |
| 72 | +CONFIG_CLK=y |
| 73 | +CONFIG_CMD_MMC=y |
| 74 | +CONFIG_DM_MMC=y |
| 75 | +CONFIG_ARM_PL180_MMCI=y |
| 76 | +CONFIG_MMC_SDHCI_ADMA_HELPERS=y |
| 77 | +CONFIG_MMC_WRITE=y |
| 78 | +CONFIG_DM_GPIO=y |
| 79 | CONFIG_PHYLIB=y |
| 80 | CONFIG_PHY_SMSC=y |
| 81 | CONFIG_SMC911X=y |
| 82 | diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h |
| 83 | index 4cf1170ffb..1f28a0f6c0 100644 |
| 84 | --- a/include/configs/corstone1000.h |
| 85 | +++ b/include/configs/corstone1000.h |
| 86 | @@ -58,7 +58,9 @@ |
| 87 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 88 | |
| 89 | #define BOOT_TARGET_DEVICES(func) \ |
| 90 | - func(USB, usb, 0) |
| 91 | + func(USB, usb, 0) \ |
| 92 | + func(MMC, mmc, 0) \ |
| 93 | + func(MMC, mmc, 1) |
| 94 | |
| 95 | #include <config_distro_bootcmd.h> |
| 96 | |
| 97 | -- |
| 98 | 2.17.1 |
| 99 | |