Andrew Geissler | ea144b03 | 2023-01-27 16:03:57 -0600 | [diff] [blame^] | 1 | From 181f5efb401ffaa5ab0898b07a976796f75e502a Mon Sep 17 00:00:00 2001 |
Brad Bishop | bec4ebc | 2022-08-03 09:55:16 -0400 | [diff] [blame] | 2 | From: Qi Feng <qi.feng@arm.com> |
| 3 | Date: Tue, 26 Jul 2022 18:13:23 +0800 |
| 4 | Subject: [PATCH 2/9] vexpress64: add MPU memory map for the BASER_FVP |
| 5 | |
| 6 | The previous patch added support for initializing an Armv8 MPU. There is only an |
| 7 | MPU at S-EL2 on the BASER_FVP, so add a platform-specific MPU memory map. |
| 8 | |
| 9 | See https://developer.arm.com/documentation/100964/1117/Base-Platform/Base---memory/BaseR-Platform-memory-map |
| 10 | |
| 11 | Upstream-Status: Inappropriate [other] |
| 12 | Implementation pending further discussion |
| 13 | Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> |
| 14 | Signed-off-by: Qi Feng <qi.feng@arm.com> |
| 15 | --- |
| 16 | board/armltd/vexpress64/vexpress64.c | 22 ++++++++++++++++++++++ |
| 17 | 1 file changed, 22 insertions(+) |
| 18 | |
| 19 | diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c |
Andrew Geissler | ea144b03 | 2023-01-27 16:03:57 -0600 | [diff] [blame^] | 20 | index af326dc6f4..2310d18eb7 100644 |
Brad Bishop | bec4ebc | 2022-08-03 09:55:16 -0400 | [diff] [blame] | 21 | --- a/board/armltd/vexpress64/vexpress64.c |
| 22 | +++ b/board/armltd/vexpress64/vexpress64.c |
| 23 | @@ -19,6 +19,7 @@ |
| 24 | #include <dm/platform_data/serial_pl01x.h> |
| 25 | #include "pcie.h" |
| 26 | #include <asm/armv8/mmu.h> |
| 27 | +#include <asm/armv8/mpu.h> |
| 28 | #ifdef CONFIG_VIRTIO_NET |
| 29 | #include <virtio_types.h> |
| 30 | #include <virtio.h> |
| 31 | @@ -37,6 +38,27 @@ U_BOOT_DRVINFO(vexpress_serials) = { |
| 32 | .plat = &serial_plat, |
| 33 | }; |
| 34 | |
| 35 | +static struct mpu_region vexpress64_aemv8r_mem_map[] = { |
| 36 | + { |
| 37 | + .start = 0x0UL, |
| 38 | + .end = 0x7fffffffUL, |
| 39 | + .attrs = PRLAR_ATTRIDX(MT_NORMAL) |
| 40 | + }, { |
| 41 | + .start = 0x80000000UL, |
| 42 | + .end = 0xffffffffUL, |
| 43 | + .attrs = PRLAR_ATTRIDX(MT_DEVICE_NGNRNE) |
| 44 | + }, { |
| 45 | + .start = 0x100000000UL, |
| 46 | + .end = 0xffffffffffUL, |
| 47 | + .attrs = PRLAR_ATTRIDX(MT_NORMAL) |
| 48 | + }, { |
| 49 | + /* List terminator */ |
| 50 | + 0, |
| 51 | + } |
| 52 | +}; |
| 53 | + |
| 54 | +struct mpu_region *mpu_mem_map = vexpress64_aemv8r_mem_map; |
| 55 | + |
| 56 | static struct mm_region vexpress64_mem_map[] = { |
| 57 | { |
| 58 | .virt = V2M_PA_BASE, |
| 59 | -- |
| 60 | 2.25.1 |
| 61 | |