Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 1 | From f82b24b2685d0cde8f8fdd0a1dcffe7b76b2027c Mon Sep 17 00:00:00 2001 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
| 3 | Date: Sun, 30 Sep 2018 16:31:26 +0530 |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 4 | Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed. |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 5 | |
| 6 | --- |
| 7 | bfd/bfd-in2.h | 10 +++ |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 8 | bfd/elf32-microblaze.c | 63 +++++++++++++++++- |
| 9 | bfd/elf64-microblaze.c | 59 +++++++++++++++++ |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 10 | bfd/libbfd.h | 2 + |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 11 | bfd/reloc.c | 12 ++++ |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 12 | include/elf/microblaze.h | 2 + |
| 13 | opcodes/microblaze-opc.h | 4 +- |
| 14 | opcodes/microblaze-opcm.h | 4 +- |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 15 | 9 files changed, 243 insertions(+), 40 deletions(-) |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 16 | |
| 17 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 18 | index 52c81b10b6d..c6738960bb2 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 19 | --- a/bfd/bfd-in2.h |
| 20 | +++ b/bfd/bfd-in2.h |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 21 | @@ -5373,11 +5373,21 @@ value in two words (with an imm instruction). No relocation is |
| 22 | done here - only used for relaxing */ |
| 23 | BFD_RELOC_MICROBLAZE_64_NONE, |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 24 | |
| 25 | +/* This is a 64 bit reloc that stores the 32 bit pc relative |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 26 | +value in two words (with an imml instruction). No relocation is |
| 27 | +done here - only used for relaxing */ |
| 28 | + BFD_RELOC_MICROBLAZE_64, |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 29 | + |
| 30 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
| 31 | value in two words (with an imm instruction). The relocation is |
| 32 | PC-relative GOT offset */ |
| 33 | BFD_RELOC_MICROBLAZE_64_GOTPC, |
| 34 | |
| 35 | +/* This is a 64 bit reloc that stores the 32 bit pc relative |
| 36 | +value in two words (with an imml instruction). The relocation is |
| 37 | +PC-relative GOT offset */ |
| 38 | + BFD_RELOC_MICROBLAZE_64_GPC, |
| 39 | + |
| 40 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
| 41 | value in two words (with an imm instruction). The relocation is |
| 42 | GOT offset */ |
| 43 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 44 | index cb7271f5017..a31b407cfbf 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 45 | --- a/bfd/elf32-microblaze.c |
| 46 | +++ b/bfd/elf32-microblaze.c |
| 47 | @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
| 48 | 0x0000ffff, /* Dest Mask. */ |
| 49 | TRUE), /* PC relative offset? */ |
| 50 | |
| 51 | + HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ |
| 52 | + 0, /* Rightshift. */ |
| 53 | + 2, /* Size (0 = byte, 1 = short, 2 = long). */ |
| 54 | + 16, /* Bitsize. */ |
| 55 | + TRUE, /* PC_relative. */ |
| 56 | + 0, /* Bitpos. */ |
| 57 | + complain_overflow_dont, /* Complain on overflow. */ |
| 58 | + bfd_elf_generic_reloc,/* Special Function. */ |
| 59 | + "R_MICROBLAZE_IMML_64", /* Name. */ |
| 60 | + FALSE, /* Partial Inplace. */ |
| 61 | + 0, /* Source Mask. */ |
| 62 | + 0x0000ffff, /* Dest Mask. */ |
| 63 | + FALSE), /* PC relative offset? */ |
| 64 | + |
| 65 | /* A 64 bit relocation. Table entry not really used. */ |
| 66 | HOWTO (R_MICROBLAZE_64, /* Type. */ |
| 67 | 0, /* Rightshift. */ |
| 68 | @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
| 69 | 0x0000ffff, /* Dest Mask. */ |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 70 | TRUE), /* PC relative offset? */ |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 71 | |
| 72 | + /* A 64 bit GOTPC relocation. Table-entry not really used. */ |
| 73 | + HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ |
| 74 | + 0, /* Rightshift. */ |
| 75 | + 2, /* Size (0 = byte, 1 = short, 2 = long). */ |
| 76 | + 16, /* Bitsize. */ |
| 77 | + TRUE, /* PC_relative. */ |
| 78 | + 0, /* Bitpos. */ |
| 79 | + complain_overflow_dont, /* Complain on overflow. */ |
| 80 | + bfd_elf_generic_reloc, /* Special Function. */ |
| 81 | + "R_MICROBLAZE_GPC_64", /* Name. */ |
| 82 | + FALSE, /* Partial Inplace. */ |
| 83 | + 0, /* Source Mask. */ |
| 84 | + 0x0000ffff, /* Dest Mask. */ |
| 85 | + TRUE), /* PC relative offset? */ |
| 86 | + |
| 87 | /* A 64 bit GOT relocation. Table-entry not really used. */ |
| 88 | HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ |
| 89 | 0, /* Rightshift. */ |
| 90 | @@ -619,9 +648,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, |
| 91 | case BFD_RELOC_VTABLE_ENTRY: |
| 92 | microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; |
| 93 | break; |
| 94 | + case BFD_RELOC_MICROBLAZE_64: |
| 95 | + microblaze_reloc = R_MICROBLAZE_IMML_64; |
| 96 | + break; |
| 97 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
| 98 | microblaze_reloc = R_MICROBLAZE_GOTPC_64; |
| 99 | break; |
| 100 | + case BFD_RELOC_MICROBLAZE_64_GPC: |
| 101 | + microblaze_reloc = R_MICROBLAZE_GPC_64; |
| 102 | + break; |
| 103 | case BFD_RELOC_MICROBLAZE_64_GOT: |
| 104 | microblaze_reloc = R_MICROBLAZE_GOT_64; |
| 105 | break; |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 106 | @@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd, |
| 107 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); |
| 108 | } |
| 109 | break; |
| 110 | + case R_MICROBLAZE_IMML_64: |
| 111 | + { |
| 112 | + /* This was a PC-relative instruction that was |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 113 | + completely resolved. */ |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 114 | + int sfix, efix; |
| 115 | + unsigned int val; |
| 116 | + bfd_vma target_address; |
| 117 | + target_address = irel->r_addend + irel->r_offset; |
| 118 | + sfix = calc_fixup (irel->r_offset, 0, sec); |
| 119 | + efix = calc_fixup (target_address, 0, sec); |
| 120 | + |
| 121 | + /* Validate the in-band val. */ |
| 122 | + val = bfd_get_32 (abfd, contents + irel->r_offset); |
| 123 | + if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { |
| 124 | + fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); |
| 125 | + } |
| 126 | + irel->r_addend -= (efix - sfix); |
| 127 | + /* Should use HOWTO. */ |
| 128 | + microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, |
| 129 | + irel->r_addend); |
| 130 | + } |
| 131 | + break; |
| 132 | case R_MICROBLAZE_NONE: |
| 133 | case R_MICROBLAZE_32_NONE: |
| 134 | { |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 135 | @@ -2038,9 +2095,9 @@ microblaze_elf_relax_section (bfd *abfd, |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 136 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
| 137 | irelscan->r_addend); |
| 138 | } |
| 139 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
| 140 | - { |
| 141 | - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 142 | + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
| 143 | + { |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 144 | + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
| 145 | |
| 146 | /* Look at the reloc only if the value has been resolved. */ |
| 147 | if (isym->st_shndx == shndx |
| 148 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 149 | index fa4b95e47e0..d55700fc513 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 150 | --- a/bfd/elf64-microblaze.c |
| 151 | +++ b/bfd/elf64-microblaze.c |
| 152 | @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
| 153 | 0x0000ffff, /* Dest Mask. */ |
| 154 | TRUE), /* PC relative offset? */ |
| 155 | |
| 156 | + /* A 64 bit relocation. Table entry not really used. */ |
| 157 | + HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ |
| 158 | + 0, /* Rightshift. */ |
| 159 | + 4, /* Size (0 = byte, 1 = short, 2 = long). */ |
| 160 | + 64, /* Bitsize. */ |
| 161 | + TRUE, /* PC_relative. */ |
| 162 | + 0, /* Bitpos. */ |
| 163 | + complain_overflow_dont, /* Complain on overflow. */ |
| 164 | + bfd_elf_generic_reloc,/* Special Function. */ |
| 165 | + "R_MICROBLAZE_IMML_64", /* Name. */ |
| 166 | + FALSE, /* Partial Inplace. */ |
| 167 | + 0, /* Source Mask. */ |
| 168 | + 0x0000ffff, /* Dest Mask. */ |
| 169 | + TRUE), /* PC relative offset? */ |
| 170 | + |
| 171 | /* A 64 bit relocation. Table entry not really used. */ |
| 172 | HOWTO (R_MICROBLAZE_64, /* Type. */ |
| 173 | 0, /* Rightshift. */ |
| 174 | @@ -265,6 +280,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
| 175 | 0x0000ffff, /* Dest Mask. */ |
| 176 | TRUE), /* PC relative offset? */ |
| 177 | |
| 178 | + /* A 64 bit GOTPC relocation. Table-entry not really used. */ |
| 179 | + HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ |
| 180 | + 0, /* Rightshift. */ |
| 181 | + 2, /* Size (0 = byte, 1 = short, 2 = long). */ |
| 182 | + 16, /* Bitsize. */ |
| 183 | + TRUE, /* PC_relative. */ |
| 184 | + 0, /* Bitpos. */ |
| 185 | + complain_overflow_dont, /* Complain on overflow. */ |
| 186 | + bfd_elf_generic_reloc, /* Special Function. */ |
| 187 | + "R_MICROBLAZE_GPC_64", /* Name. */ |
| 188 | + FALSE, /* Partial Inplace. */ |
| 189 | + 0, /* Source Mask. */ |
| 190 | + 0x0000ffff, /* Dest Mask. */ |
| 191 | + TRUE), /* PC relative offset? */ |
| 192 | + |
| 193 | /* A 64 bit GOT relocation. Table-entry not really used. */ |
| 194 | HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ |
| 195 | 0, /* Rightshift. */ |
| 196 | @@ -589,9 +619,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, |
| 197 | case BFD_RELOC_VTABLE_ENTRY: |
| 198 | microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; |
| 199 | break; |
| 200 | + case BFD_RELOC_MICROBLAZE_64: |
| 201 | + microblaze_reloc = R_MICROBLAZE_IMML_64; |
| 202 | + break; |
| 203 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
| 204 | microblaze_reloc = R_MICROBLAZE_GOTPC_64; |
| 205 | break; |
| 206 | + case BFD_RELOC_MICROBLAZE_64_GPC: |
| 207 | + microblaze_reloc = R_MICROBLAZE_GPC_64; |
| 208 | + break; |
| 209 | case BFD_RELOC_MICROBLAZE_64_GOT: |
| 210 | microblaze_reloc = R_MICROBLAZE_GOT_64; |
| 211 | break; |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 212 | @@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 213 | break; /* Do nothing. */ |
| 214 | |
| 215 | case (int) R_MICROBLAZE_GOTPC_64: |
| 216 | + case (int) R_MICROBLAZE_GPC_64: |
| 217 | relocation = htab->sgotplt->output_section->vma |
| 218 | + htab->sgotplt->output_offset; |
| 219 | relocation -= (input_section->output_section->vma |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 220 | @@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd, |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 221 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); |
| 222 | } |
| 223 | break; |
| 224 | + case R_MICROBLAZE_IMML_64: |
| 225 | + { |
| 226 | + /* This was a PC-relative instruction that was |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 227 | + completely resolved. */ |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 228 | + int sfix, efix; |
| 229 | + unsigned int val; |
| 230 | + bfd_vma target_address; |
| 231 | + target_address = irel->r_addend + irel->r_offset; |
| 232 | + sfix = calc_fixup (irel->r_offset, 0, sec); |
| 233 | + efix = calc_fixup (target_address, 0, sec); |
| 234 | + |
| 235 | + /* Validate the in-band val. */ |
| 236 | + val = bfd_get_32 (abfd, contents + irel->r_offset); |
| 237 | + if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { |
| 238 | + fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); |
| 239 | + } |
| 240 | + irel->r_addend -= (efix - sfix); |
| 241 | + /* Should use HOWTO. */ |
| 242 | + microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, |
| 243 | + irel->r_addend); |
| 244 | + } |
| 245 | + break; |
| 246 | case R_MICROBLAZE_NONE: |
| 247 | case R_MICROBLAZE_32_NONE: |
| 248 | { |
| 249 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 250 | index a01891f3423..4e71991273e 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 251 | --- a/bfd/libbfd.h |
| 252 | +++ b/bfd/libbfd.h |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 253 | @@ -2905,7 +2905,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 254 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
| 255 | "BFD_RELOC_MICROBLAZE_32_NONE", |
| 256 | "BFD_RELOC_MICROBLAZE_64_NONE", |
| 257 | + "BFD_RELOC_MICROBLAZE_64", |
| 258 | "BFD_RELOC_MICROBLAZE_64_GOTPC", |
| 259 | + "BFD_RELOC_MICROBLAZE_64_GPC", |
| 260 | "BFD_RELOC_MICROBLAZE_64_GOT", |
| 261 | "BFD_RELOC_MICROBLAZE_64_PLT", |
| 262 | "BFD_RELOC_MICROBLAZE_64_GOTOFF", |
| 263 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 264 | index 78f13180c71..8b3cc604738 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 265 | --- a/bfd/reloc.c |
| 266 | +++ b/bfd/reloc.c |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 267 | @@ -6814,12 +6814,24 @@ ENUMDOC |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 268 | done here - only used for relaxing |
| 269 | ENUM |
| 270 | BFD_RELOC_MICROBLAZE_64_NONE |
| 271 | +ENUMDOC |
| 272 | + This is a 32 bit reloc that stores the 32 bit pc relative |
| 273 | + value in two words (with an imml instruction). No relocation is |
| 274 | + done here - only used for relaxing |
| 275 | +ENUM |
| 276 | + BFD_RELOC_MICROBLAZE_64 |
| 277 | ENUMDOC |
| 278 | This is a 64 bit reloc that stores the 32 bit pc relative |
| 279 | value in two words (with an imm instruction). No relocation is |
| 280 | done here - only used for relaxing |
| 281 | ENUM |
| 282 | BFD_RELOC_MICROBLAZE_64_GOTPC |
| 283 | +ENUMDOC |
| 284 | + This is a 64 bit reloc that stores the 32 bit pc relative |
| 285 | + value in two words (with an imml instruction). No relocation is |
| 286 | + done here - only used for relaxing |
| 287 | +ENUM |
| 288 | + BFD_RELOC_MICROBLAZE_64_GPC |
| 289 | ENUMDOC |
| 290 | This is a 64 bit reloc that stores the 32 bit pc relative |
| 291 | value in two words (with an imm instruction). The relocation is |
| 292 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 293 | index 0dba2c0f44f..030eb99a1a0 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 294 | --- a/include/elf/microblaze.h |
| 295 | +++ b/include/elf/microblaze.h |
| 296 | @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) |
| 297 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ |
| 298 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ |
| 299 | RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) |
| 300 | + RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) |
| 301 | + RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 302 | END_RELOC_NUMBERS (R_MICROBLAZE_max) |
| 303 | |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 304 | /* Global base address names. */ |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 305 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 306 | index 28dc991c430..46263bc7e16 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 307 | --- a/opcodes/microblaze-opc.h |
| 308 | +++ b/opcodes/microblaze-opc.h |
| 309 | @@ -538,8 +538,8 @@ struct op_code_struct |
| 310 | {"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst }, |
| 311 | {"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst }, |
| 312 | {"slr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst }, |
| 313 | - {"lli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ |
| 314 | - {"sli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ |
| 315 | + {"lli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xEC000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ |
| 316 | + {"sli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xFC000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ |
| 317 | {"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */ |
| 318 | {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, |
| 319 | {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, |
| 320 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 321 | index ad475a4af15..ee01cdb7d9b 100644 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 322 | --- a/opcodes/microblaze-opcm.h |
| 323 | +++ b/opcodes/microblaze-opcm.h |
| 324 | @@ -40,8 +40,8 @@ enum microblaze_instr |
| 325 | imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, |
| 326 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, |
| 327 | bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, |
| 328 | - sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 329 | - sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 330 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, |
Andrew Geissler | a9ff2b3 | 2020-10-16 10:11:54 -0500 | [diff] [blame] | 331 | + sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 332 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, |
| 333 | fint, fsqrt, |
| 334 | tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, |
| 335 | -- |
| 336 | 2.17.1 |
| 337 | |