Zane Shelley | c702626 | 2022-02-22 16:37:36 -0600 | [diff] [blame] | 1 | #include <assert.h> |
| 2 | |
| 3 | #include <util/pdbg.hpp> |
| 4 | |
| 5 | #include <map> |
| 6 | |
| 7 | namespace sim |
| 8 | { |
| 9 | |
| 10 | class ScomAccess |
| 11 | { |
| 12 | private: |
| 13 | /** @brief Default constructor. */ |
| 14 | ScomAccess() = default; |
| 15 | |
| 16 | /** @brief Destructor. */ |
| 17 | ~ScomAccess() = default; |
| 18 | |
| 19 | /** @brief Copy constructor. */ |
| 20 | ScomAccess(const ScomAccess&) = delete; |
| 21 | |
| 22 | /** @brief Assignment operator. */ |
| 23 | ScomAccess& operator=(const ScomAccess&) = delete; |
| 24 | |
| 25 | public: |
| 26 | /** @brief Provides access to a singleton instance of this object. */ |
| 27 | static ScomAccess& getSingleton() |
| 28 | { |
| 29 | static ScomAccess theScomAccess; |
| 30 | return theScomAccess; |
| 31 | } |
| 32 | |
| 33 | private: |
| 34 | /** The SCOM values for each chip and address. */ |
| 35 | std::map<pdbg_target*, std::map<uint64_t, uint64_t>> iv_values; |
| 36 | |
| 37 | /** All addresses that will return a SCOM error. */ |
| 38 | std::map<pdbg_target*, std::map<uint64_t, bool>> iv_errors; |
| 39 | |
| 40 | public: |
| 41 | /** |
| 42 | * @brief Stores a SCOM register value, which can be accessed later in test. |
| 43 | * @param i_target The target chip. |
| 44 | * @param i_addr A SCOM address on the given chip. |
| 45 | * @param i_val The value of the given address. |
| 46 | */ |
| 47 | void add(pdbg_target* i_target, uint64_t i_addr, uint64_t i_val) |
| 48 | { |
| 49 | assert(nullptr != i_target); |
| 50 | |
| 51 | iv_values[i_target][i_addr] = i_val; |
| 52 | } |
| 53 | |
| 54 | /** |
| 55 | * @brief This can be used to specify if a specific SCOM address will return |
| 56 | * an error when accessed. This is useful for error path testing. |
| 57 | * @param i_target The target chip. |
| 58 | * @param i_addr A SCOM address on the given chip. |
| 59 | */ |
| 60 | void error(pdbg_target* i_target, uint64_t i_addr) |
| 61 | { |
| 62 | assert(nullptr != i_target); |
| 63 | |
| 64 | iv_errors[i_target][i_addr] = true; |
| 65 | } |
| 66 | |
| 67 | /** |
| 68 | * @brief Clears all SCOM value/error data. |
| 69 | */ |
| 70 | void flush() |
| 71 | { |
| 72 | iv_values.clear(); |
| 73 | iv_errors.clear(); |
| 74 | } |
| 75 | |
| 76 | /** |
| 77 | * @brief Returns the stored SCOM register value. |
| 78 | * @param i_target The target chip. |
| 79 | * @param i_addr A SCOM address on the given chip. |
| 80 | * @param o_val The value of the given address. If the target address |
| 81 | * does not exist in iv_values, a value of 0 is returned. |
| 82 | * @return Will return 1 if the target address exists in iv_errors. |
| 83 | * Otherwise, will return 0 for a successful SCOM access. |
| 84 | */ |
| 85 | int get(pdbg_target* i_target, uint64_t i_addr, uint64_t& o_val) |
| 86 | { |
| 87 | assert(nullptr != i_target); |
| 88 | |
| 89 | if (iv_errors[i_target][i_addr]) |
| 90 | { |
| 91 | return 1; |
| 92 | } |
| 93 | |
| 94 | o_val = iv_values[i_target][i_addr]; |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | }; |
| 99 | |
| 100 | class CfamAccess |
| 101 | { |
| 102 | private: |
| 103 | /** @brief Default constructor. */ |
| 104 | CfamAccess() = default; |
| 105 | |
| 106 | /** @brief Destructor. */ |
| 107 | ~CfamAccess() = default; |
| 108 | |
| 109 | /** @brief Copy constructor. */ |
| 110 | CfamAccess(const CfamAccess&) = delete; |
| 111 | |
| 112 | /** @brief Assignment operator. */ |
| 113 | CfamAccess& operator=(const CfamAccess&) = delete; |
| 114 | |
| 115 | public: |
| 116 | /** @brief Provides access to a singleton instance of this object. */ |
| 117 | static CfamAccess& getSingleton() |
| 118 | { |
| 119 | static CfamAccess theCfamAccess; |
| 120 | return theCfamAccess; |
| 121 | } |
| 122 | |
| 123 | private: |
| 124 | /** The CFAM values for each chip and address. */ |
| 125 | std::map<pdbg_target*, std::map<uint32_t, uint32_t>> iv_values; |
| 126 | |
| 127 | /** All addresses that will return a CFAM error. */ |
| 128 | std::map<pdbg_target*, std::map<uint32_t, bool>> iv_errors; |
| 129 | |
| 130 | public: |
| 131 | /** |
| 132 | * @brief Stores a CFAM register value, which can be accessed later in test. |
| 133 | * @param i_target The target chip. |
| 134 | * @param i_addr A CFAM address on the given chip. |
| 135 | * @param i_val The value of the given address. |
| 136 | */ |
| 137 | void add(pdbg_target* i_target, uint32_t i_addr, uint32_t i_val) |
| 138 | { |
| 139 | assert(nullptr != i_target); |
| 140 | |
| 141 | iv_values[i_target][i_addr] = i_val; |
| 142 | } |
| 143 | |
| 144 | /** |
| 145 | * @brief This can be used to specify if a specific CFAM address will return |
| 146 | * an error when accessed. This is useful for error path testing. |
| 147 | * @param i_target The target chip. |
| 148 | * @param i_addr A CFAM address on the given chip. |
| 149 | */ |
| 150 | void error(pdbg_target* i_target, uint32_t i_addr) |
| 151 | { |
| 152 | assert(nullptr != i_target); |
| 153 | |
| 154 | iv_errors[i_target][i_addr] = true; |
| 155 | } |
| 156 | |
| 157 | /** |
| 158 | * @brief Clears all CFAM value/error data. |
| 159 | */ |
| 160 | void flush() |
| 161 | { |
| 162 | iv_values.clear(); |
| 163 | iv_errors.clear(); |
| 164 | } |
| 165 | |
| 166 | /** |
| 167 | * @brief Returns the stored CFAM register value. |
| 168 | * @param i_target The target chip. |
| 169 | * @param i_addr A CFAM address on the given chip. |
| 170 | * @param o_val The value of the given address. If the target address |
| 171 | * does not exist in iv_values, a value of 0 is returned. |
| 172 | * @return Will return 1 if the target address exists in iv_errors. |
| 173 | * Otherwise, will return 0 for a successful CFAM access. |
| 174 | */ |
| 175 | int get(pdbg_target* i_target, uint32_t i_addr, uint32_t& o_val) |
| 176 | { |
| 177 | assert(nullptr != i_target); |
| 178 | |
| 179 | if (iv_errors[i_target][i_addr]) |
| 180 | { |
| 181 | return 1; |
| 182 | } |
| 183 | |
| 184 | o_val = iv_values[i_target][i_addr]; |
| 185 | |
| 186 | return 0; |
| 187 | } |
| 188 | }; |
| 189 | |
| 190 | } // namespace sim |