| <?xml version="1.0" encoding="UTF-8"?> |
| <attn_node model_ec="P10_10,P10_20" name="CFIR_TP_CS_RE" reg_type="SCOM"> |
| <register name="CFIR_TP_XSTOP"> |
| <instance addr="0x01040000" reg_inst="0"/> |
| </register> |
| <register name="CFIR_TP_XSTOP_MASK"> |
| <instance addr="0x01040040" reg_inst="0"/> |
| </register> |
| <register name="CFIR_TP_RECOV"> |
| <instance addr="0x01040001" reg_inst="0"/> |
| </register> |
| <register name="CFIR_TP_RECOV_MASK"> |
| <instance addr="0x01040041" reg_inst="0"/> |
| </register> |
| <rule attn_type="CS" node_inst="0"> |
| <expr type="and"> |
| <expr type="reg" value1="CFIR_TP_XSTOP"/> |
| <expr type="not"> |
| <expr type="reg" value1="CFIR_TP_XSTOP_MASK"/> |
| </expr> |
| <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| </expr> |
| </rule> |
| <rule attn_type="RE" node_inst="0"> |
| <expr type="and"> |
| <expr type="reg" value1="CFIR_TP_RECOV"/> |
| <expr type="not"> |
| <expr type="reg" value1="CFIR_TP_RECOV_MASK"/> |
| </expr> |
| <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| </expr> |
| </rule> |
| <bit child_node="TP_LOCAL_FIR" node_inst="0" pos="4">Local FIR</bit> |
| <bit child_node="OCC_FIR" node_inst="0" pos="5">OCC Local Fault Isolation Register</bit> |
| <bit child_node="PBAO_FIR" node_inst="0" pos="6">PBA Local Fault Isolation Register. Register bits are set for any error condition detected by the PBA. The PBAFIR will freeze upon logging the first error not masked in PBAFIRMASK.</bit> |
| </attn_node> |