Update chip data files for FIR on the core target
This includes the the EQ_CORE_FIR, EQ_L2_FIR, EQ_L3_FIR, and EQ_NCU_FIR.
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I7584b74381620db96e0d51283286ccbda96bca8d
diff --git a/xml/p10/node_eq_core_fir.xml b/xml/p10/node_eq_core_fir.xml
index 85e933b..c8b0de5 100644
--- a/xml/p10/node_eq_core_fir.xml
+++ b/xml/p10/node_eq_core_fir.xml
@@ -170,6 +170,918 @@
<instance addr="0x27022448" reg_inst="30"/>
<instance addr="0x27021448" reg_inst="31"/>
</register>
+ <register name="PC_FIR_HOLD_OUT">
+ <instance addr="0x20028451" reg_inst="0"/>
+ <instance addr="0x20024451" reg_inst="1"/>
+ <instance addr="0x20022451" reg_inst="2"/>
+ <instance addr="0x20021451" reg_inst="3"/>
+ <instance addr="0x21028451" reg_inst="4"/>
+ <instance addr="0x21024451" reg_inst="5"/>
+ <instance addr="0x21022451" reg_inst="6"/>
+ <instance addr="0x21021451" reg_inst="7"/>
+ <instance addr="0x22028451" reg_inst="8"/>
+ <instance addr="0x22024451" reg_inst="9"/>
+ <instance addr="0x22022451" reg_inst="10"/>
+ <instance addr="0x22021451" reg_inst="11"/>
+ <instance addr="0x23028451" reg_inst="12"/>
+ <instance addr="0x23024451" reg_inst="13"/>
+ <instance addr="0x23022451" reg_inst="14"/>
+ <instance addr="0x23021451" reg_inst="15"/>
+ <instance addr="0x24028451" reg_inst="16"/>
+ <instance addr="0x24024451" reg_inst="17"/>
+ <instance addr="0x24022451" reg_inst="18"/>
+ <instance addr="0x24021451" reg_inst="19"/>
+ <instance addr="0x25028451" reg_inst="20"/>
+ <instance addr="0x25024451" reg_inst="21"/>
+ <instance addr="0x25022451" reg_inst="22"/>
+ <instance addr="0x25021451" reg_inst="23"/>
+ <instance addr="0x26028451" reg_inst="24"/>
+ <instance addr="0x26024451" reg_inst="25"/>
+ <instance addr="0x26022451" reg_inst="26"/>
+ <instance addr="0x26021451" reg_inst="27"/>
+ <instance addr="0x27028451" reg_inst="28"/>
+ <instance addr="0x27024451" reg_inst="29"/>
+ <instance addr="0x27022451" reg_inst="30"/>
+ <instance addr="0x27021451" reg_inst="31"/>
+ </register>
+ <register name="THRCTL_HOLD_OUT">
+ <instance addr="0x20028455" reg_inst="0"/>
+ <instance addr="0x20024455" reg_inst="1"/>
+ <instance addr="0x20022455" reg_inst="2"/>
+ <instance addr="0x20021455" reg_inst="3"/>
+ <instance addr="0x21028455" reg_inst="4"/>
+ <instance addr="0x21024455" reg_inst="5"/>
+ <instance addr="0x21022455" reg_inst="6"/>
+ <instance addr="0x21021455" reg_inst="7"/>
+ <instance addr="0x22028455" reg_inst="8"/>
+ <instance addr="0x22024455" reg_inst="9"/>
+ <instance addr="0x22022455" reg_inst="10"/>
+ <instance addr="0x22021455" reg_inst="11"/>
+ <instance addr="0x23028455" reg_inst="12"/>
+ <instance addr="0x23024455" reg_inst="13"/>
+ <instance addr="0x23022455" reg_inst="14"/>
+ <instance addr="0x23021455" reg_inst="15"/>
+ <instance addr="0x24028455" reg_inst="16"/>
+ <instance addr="0x24024455" reg_inst="17"/>
+ <instance addr="0x24022455" reg_inst="18"/>
+ <instance addr="0x24021455" reg_inst="19"/>
+ <instance addr="0x25028455" reg_inst="20"/>
+ <instance addr="0x25024455" reg_inst="21"/>
+ <instance addr="0x25022455" reg_inst="22"/>
+ <instance addr="0x25021455" reg_inst="23"/>
+ <instance addr="0x26028455" reg_inst="24"/>
+ <instance addr="0x26024455" reg_inst="25"/>
+ <instance addr="0x26022455" reg_inst="26"/>
+ <instance addr="0x26021455" reg_inst="27"/>
+ <instance addr="0x27028455" reg_inst="28"/>
+ <instance addr="0x27024455" reg_inst="29"/>
+ <instance addr="0x27022455" reg_inst="30"/>
+ <instance addr="0x27021455" reg_inst="31"/>
+ </register>
+ <register name="VSU_HOLD_OUT">
+ <instance addr="0x200284B6" reg_inst="0"/>
+ <instance addr="0x200244B6" reg_inst="1"/>
+ <instance addr="0x200224B6" reg_inst="2"/>
+ <instance addr="0x200214B6" reg_inst="3"/>
+ <instance addr="0x210284B6" reg_inst="4"/>
+ <instance addr="0x210244B6" reg_inst="5"/>
+ <instance addr="0x210224B6" reg_inst="6"/>
+ <instance addr="0x210214B6" reg_inst="7"/>
+ <instance addr="0x220284B6" reg_inst="8"/>
+ <instance addr="0x220244B6" reg_inst="9"/>
+ <instance addr="0x220224B6" reg_inst="10"/>
+ <instance addr="0x220214B6" reg_inst="11"/>
+ <instance addr="0x230284B6" reg_inst="12"/>
+ <instance addr="0x230244B6" reg_inst="13"/>
+ <instance addr="0x230224B6" reg_inst="14"/>
+ <instance addr="0x230214B6" reg_inst="15"/>
+ <instance addr="0x240284B6" reg_inst="16"/>
+ <instance addr="0x240244B6" reg_inst="17"/>
+ <instance addr="0x240224B6" reg_inst="18"/>
+ <instance addr="0x240214B6" reg_inst="19"/>
+ <instance addr="0x250284B6" reg_inst="20"/>
+ <instance addr="0x250244B6" reg_inst="21"/>
+ <instance addr="0x250224B6" reg_inst="22"/>
+ <instance addr="0x250214B6" reg_inst="23"/>
+ <instance addr="0x260284B6" reg_inst="24"/>
+ <instance addr="0x260244B6" reg_inst="25"/>
+ <instance addr="0x260224B6" reg_inst="26"/>
+ <instance addr="0x260214B6" reg_inst="27"/>
+ <instance addr="0x270284B6" reg_inst="28"/>
+ <instance addr="0x270244B6" reg_inst="29"/>
+ <instance addr="0x270224B6" reg_inst="30"/>
+ <instance addr="0x270214B6" reg_inst="31"/>
+ </register>
+ <register name="TFAC_HOLD_OUT">
+ <instance addr="0x200284B7" reg_inst="0"/>
+ <instance addr="0x200244B7" reg_inst="1"/>
+ <instance addr="0x200224B7" reg_inst="2"/>
+ <instance addr="0x200214B7" reg_inst="3"/>
+ <instance addr="0x210284B7" reg_inst="4"/>
+ <instance addr="0x210244B7" reg_inst="5"/>
+ <instance addr="0x210224B7" reg_inst="6"/>
+ <instance addr="0x210214B7" reg_inst="7"/>
+ <instance addr="0x220284B7" reg_inst="8"/>
+ <instance addr="0x220244B7" reg_inst="9"/>
+ <instance addr="0x220224B7" reg_inst="10"/>
+ <instance addr="0x220214B7" reg_inst="11"/>
+ <instance addr="0x230284B7" reg_inst="12"/>
+ <instance addr="0x230244B7" reg_inst="13"/>
+ <instance addr="0x230224B7" reg_inst="14"/>
+ <instance addr="0x230214B7" reg_inst="15"/>
+ <instance addr="0x240284B7" reg_inst="16"/>
+ <instance addr="0x240244B7" reg_inst="17"/>
+ <instance addr="0x240224B7" reg_inst="18"/>
+ <instance addr="0x240214B7" reg_inst="19"/>
+ <instance addr="0x250284B7" reg_inst="20"/>
+ <instance addr="0x250244B7" reg_inst="21"/>
+ <instance addr="0x250224B7" reg_inst="22"/>
+ <instance addr="0x250214B7" reg_inst="23"/>
+ <instance addr="0x260284B7" reg_inst="24"/>
+ <instance addr="0x260244B7" reg_inst="25"/>
+ <instance addr="0x260224B7" reg_inst="26"/>
+ <instance addr="0x260214B7" reg_inst="27"/>
+ <instance addr="0x270284B7" reg_inst="28"/>
+ <instance addr="0x270244B7" reg_inst="29"/>
+ <instance addr="0x270224B7" reg_inst="30"/>
+ <instance addr="0x270214B7" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT0">
+ <instance addr="0x20028600" reg_inst="0"/>
+ <instance addr="0x20024600" reg_inst="1"/>
+ <instance addr="0x20022600" reg_inst="2"/>
+ <instance addr="0x20021600" reg_inst="3"/>
+ <instance addr="0x21028600" reg_inst="4"/>
+ <instance addr="0x21024600" reg_inst="5"/>
+ <instance addr="0x21022600" reg_inst="6"/>
+ <instance addr="0x21021600" reg_inst="7"/>
+ <instance addr="0x22028600" reg_inst="8"/>
+ <instance addr="0x22024600" reg_inst="9"/>
+ <instance addr="0x22022600" reg_inst="10"/>
+ <instance addr="0x22021600" reg_inst="11"/>
+ <instance addr="0x23028600" reg_inst="12"/>
+ <instance addr="0x23024600" reg_inst="13"/>
+ <instance addr="0x23022600" reg_inst="14"/>
+ <instance addr="0x23021600" reg_inst="15"/>
+ <instance addr="0x24028600" reg_inst="16"/>
+ <instance addr="0x24024600" reg_inst="17"/>
+ <instance addr="0x24022600" reg_inst="18"/>
+ <instance addr="0x24021600" reg_inst="19"/>
+ <instance addr="0x25028600" reg_inst="20"/>
+ <instance addr="0x25024600" reg_inst="21"/>
+ <instance addr="0x25022600" reg_inst="22"/>
+ <instance addr="0x25021600" reg_inst="23"/>
+ <instance addr="0x26028600" reg_inst="24"/>
+ <instance addr="0x26024600" reg_inst="25"/>
+ <instance addr="0x26022600" reg_inst="26"/>
+ <instance addr="0x26021600" reg_inst="27"/>
+ <instance addr="0x27028600" reg_inst="28"/>
+ <instance addr="0x27024600" reg_inst="29"/>
+ <instance addr="0x27022600" reg_inst="30"/>
+ <instance addr="0x27021600" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT1">
+ <instance addr="0x20028601" reg_inst="0"/>
+ <instance addr="0x20024601" reg_inst="1"/>
+ <instance addr="0x20022601" reg_inst="2"/>
+ <instance addr="0x20021601" reg_inst="3"/>
+ <instance addr="0x21028601" reg_inst="4"/>
+ <instance addr="0x21024601" reg_inst="5"/>
+ <instance addr="0x21022601" reg_inst="6"/>
+ <instance addr="0x21021601" reg_inst="7"/>
+ <instance addr="0x22028601" reg_inst="8"/>
+ <instance addr="0x22024601" reg_inst="9"/>
+ <instance addr="0x22022601" reg_inst="10"/>
+ <instance addr="0x22021601" reg_inst="11"/>
+ <instance addr="0x23028601" reg_inst="12"/>
+ <instance addr="0x23024601" reg_inst="13"/>
+ <instance addr="0x23022601" reg_inst="14"/>
+ <instance addr="0x23021601" reg_inst="15"/>
+ <instance addr="0x24028601" reg_inst="16"/>
+ <instance addr="0x24024601" reg_inst="17"/>
+ <instance addr="0x24022601" reg_inst="18"/>
+ <instance addr="0x24021601" reg_inst="19"/>
+ <instance addr="0x25028601" reg_inst="20"/>
+ <instance addr="0x25024601" reg_inst="21"/>
+ <instance addr="0x25022601" reg_inst="22"/>
+ <instance addr="0x25021601" reg_inst="23"/>
+ <instance addr="0x26028601" reg_inst="24"/>
+ <instance addr="0x26024601" reg_inst="25"/>
+ <instance addr="0x26022601" reg_inst="26"/>
+ <instance addr="0x26021601" reg_inst="27"/>
+ <instance addr="0x27028601" reg_inst="28"/>
+ <instance addr="0x27024601" reg_inst="29"/>
+ <instance addr="0x27022601" reg_inst="30"/>
+ <instance addr="0x27021601" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT2">
+ <instance addr="0x20028602" reg_inst="0"/>
+ <instance addr="0x20024602" reg_inst="1"/>
+ <instance addr="0x20022602" reg_inst="2"/>
+ <instance addr="0x20021602" reg_inst="3"/>
+ <instance addr="0x21028602" reg_inst="4"/>
+ <instance addr="0x21024602" reg_inst="5"/>
+ <instance addr="0x21022602" reg_inst="6"/>
+ <instance addr="0x21021602" reg_inst="7"/>
+ <instance addr="0x22028602" reg_inst="8"/>
+ <instance addr="0x22024602" reg_inst="9"/>
+ <instance addr="0x22022602" reg_inst="10"/>
+ <instance addr="0x22021602" reg_inst="11"/>
+ <instance addr="0x23028602" reg_inst="12"/>
+ <instance addr="0x23024602" reg_inst="13"/>
+ <instance addr="0x23022602" reg_inst="14"/>
+ <instance addr="0x23021602" reg_inst="15"/>
+ <instance addr="0x24028602" reg_inst="16"/>
+ <instance addr="0x24024602" reg_inst="17"/>
+ <instance addr="0x24022602" reg_inst="18"/>
+ <instance addr="0x24021602" reg_inst="19"/>
+ <instance addr="0x25028602" reg_inst="20"/>
+ <instance addr="0x25024602" reg_inst="21"/>
+ <instance addr="0x25022602" reg_inst="22"/>
+ <instance addr="0x25021602" reg_inst="23"/>
+ <instance addr="0x26028602" reg_inst="24"/>
+ <instance addr="0x26024602" reg_inst="25"/>
+ <instance addr="0x26022602" reg_inst="26"/>
+ <instance addr="0x26021602" reg_inst="27"/>
+ <instance addr="0x27028602" reg_inst="28"/>
+ <instance addr="0x27024602" reg_inst="29"/>
+ <instance addr="0x27022602" reg_inst="30"/>
+ <instance addr="0x27021602" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT3">
+ <instance addr="0x20028603" reg_inst="0"/>
+ <instance addr="0x20024603" reg_inst="1"/>
+ <instance addr="0x20022603" reg_inst="2"/>
+ <instance addr="0x20021603" reg_inst="3"/>
+ <instance addr="0x21028603" reg_inst="4"/>
+ <instance addr="0x21024603" reg_inst="5"/>
+ <instance addr="0x21022603" reg_inst="6"/>
+ <instance addr="0x21021603" reg_inst="7"/>
+ <instance addr="0x22028603" reg_inst="8"/>
+ <instance addr="0x22024603" reg_inst="9"/>
+ <instance addr="0x22022603" reg_inst="10"/>
+ <instance addr="0x22021603" reg_inst="11"/>
+ <instance addr="0x23028603" reg_inst="12"/>
+ <instance addr="0x23024603" reg_inst="13"/>
+ <instance addr="0x23022603" reg_inst="14"/>
+ <instance addr="0x23021603" reg_inst="15"/>
+ <instance addr="0x24028603" reg_inst="16"/>
+ <instance addr="0x24024603" reg_inst="17"/>
+ <instance addr="0x24022603" reg_inst="18"/>
+ <instance addr="0x24021603" reg_inst="19"/>
+ <instance addr="0x25028603" reg_inst="20"/>
+ <instance addr="0x25024603" reg_inst="21"/>
+ <instance addr="0x25022603" reg_inst="22"/>
+ <instance addr="0x25021603" reg_inst="23"/>
+ <instance addr="0x26028603" reg_inst="24"/>
+ <instance addr="0x26024603" reg_inst="25"/>
+ <instance addr="0x26022603" reg_inst="26"/>
+ <instance addr="0x26021603" reg_inst="27"/>
+ <instance addr="0x27028603" reg_inst="28"/>
+ <instance addr="0x27024603" reg_inst="29"/>
+ <instance addr="0x27022603" reg_inst="30"/>
+ <instance addr="0x27021603" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT0">
+ <instance addr="0x20028640" reg_inst="0"/>
+ <instance addr="0x20024640" reg_inst="1"/>
+ <instance addr="0x20022640" reg_inst="2"/>
+ <instance addr="0x20021640" reg_inst="3"/>
+ <instance addr="0x21028640" reg_inst="4"/>
+ <instance addr="0x21024640" reg_inst="5"/>
+ <instance addr="0x21022640" reg_inst="6"/>
+ <instance addr="0x21021640" reg_inst="7"/>
+ <instance addr="0x22028640" reg_inst="8"/>
+ <instance addr="0x22024640" reg_inst="9"/>
+ <instance addr="0x22022640" reg_inst="10"/>
+ <instance addr="0x22021640" reg_inst="11"/>
+ <instance addr="0x23028640" reg_inst="12"/>
+ <instance addr="0x23024640" reg_inst="13"/>
+ <instance addr="0x23022640" reg_inst="14"/>
+ <instance addr="0x23021640" reg_inst="15"/>
+ <instance addr="0x24028640" reg_inst="16"/>
+ <instance addr="0x24024640" reg_inst="17"/>
+ <instance addr="0x24022640" reg_inst="18"/>
+ <instance addr="0x24021640" reg_inst="19"/>
+ <instance addr="0x25028640" reg_inst="20"/>
+ <instance addr="0x25024640" reg_inst="21"/>
+ <instance addr="0x25022640" reg_inst="22"/>
+ <instance addr="0x25021640" reg_inst="23"/>
+ <instance addr="0x26028640" reg_inst="24"/>
+ <instance addr="0x26024640" reg_inst="25"/>
+ <instance addr="0x26022640" reg_inst="26"/>
+ <instance addr="0x26021640" reg_inst="27"/>
+ <instance addr="0x27028640" reg_inst="28"/>
+ <instance addr="0x27024640" reg_inst="29"/>
+ <instance addr="0x27022640" reg_inst="30"/>
+ <instance addr="0x27021640" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT1">
+ <instance addr="0x20028641" reg_inst="0"/>
+ <instance addr="0x20024641" reg_inst="1"/>
+ <instance addr="0x20022641" reg_inst="2"/>
+ <instance addr="0x20021641" reg_inst="3"/>
+ <instance addr="0x21028641" reg_inst="4"/>
+ <instance addr="0x21024641" reg_inst="5"/>
+ <instance addr="0x21022641" reg_inst="6"/>
+ <instance addr="0x21021641" reg_inst="7"/>
+ <instance addr="0x22028641" reg_inst="8"/>
+ <instance addr="0x22024641" reg_inst="9"/>
+ <instance addr="0x22022641" reg_inst="10"/>
+ <instance addr="0x22021641" reg_inst="11"/>
+ <instance addr="0x23028641" reg_inst="12"/>
+ <instance addr="0x23024641" reg_inst="13"/>
+ <instance addr="0x23022641" reg_inst="14"/>
+ <instance addr="0x23021641" reg_inst="15"/>
+ <instance addr="0x24028641" reg_inst="16"/>
+ <instance addr="0x24024641" reg_inst="17"/>
+ <instance addr="0x24022641" reg_inst="18"/>
+ <instance addr="0x24021641" reg_inst="19"/>
+ <instance addr="0x25028641" reg_inst="20"/>
+ <instance addr="0x25024641" reg_inst="21"/>
+ <instance addr="0x25022641" reg_inst="22"/>
+ <instance addr="0x25021641" reg_inst="23"/>
+ <instance addr="0x26028641" reg_inst="24"/>
+ <instance addr="0x26024641" reg_inst="25"/>
+ <instance addr="0x26022641" reg_inst="26"/>
+ <instance addr="0x26021641" reg_inst="27"/>
+ <instance addr="0x27028641" reg_inst="28"/>
+ <instance addr="0x27024641" reg_inst="29"/>
+ <instance addr="0x27022641" reg_inst="30"/>
+ <instance addr="0x27021641" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT2">
+ <instance addr="0x20028642" reg_inst="0"/>
+ <instance addr="0x20024642" reg_inst="1"/>
+ <instance addr="0x20022642" reg_inst="2"/>
+ <instance addr="0x20021642" reg_inst="3"/>
+ <instance addr="0x21028642" reg_inst="4"/>
+ <instance addr="0x21024642" reg_inst="5"/>
+ <instance addr="0x21022642" reg_inst="6"/>
+ <instance addr="0x21021642" reg_inst="7"/>
+ <instance addr="0x22028642" reg_inst="8"/>
+ <instance addr="0x22024642" reg_inst="9"/>
+ <instance addr="0x22022642" reg_inst="10"/>
+ <instance addr="0x22021642" reg_inst="11"/>
+ <instance addr="0x23028642" reg_inst="12"/>
+ <instance addr="0x23024642" reg_inst="13"/>
+ <instance addr="0x23022642" reg_inst="14"/>
+ <instance addr="0x23021642" reg_inst="15"/>
+ <instance addr="0x24028642" reg_inst="16"/>
+ <instance addr="0x24024642" reg_inst="17"/>
+ <instance addr="0x24022642" reg_inst="18"/>
+ <instance addr="0x24021642" reg_inst="19"/>
+ <instance addr="0x25028642" reg_inst="20"/>
+ <instance addr="0x25024642" reg_inst="21"/>
+ <instance addr="0x25022642" reg_inst="22"/>
+ <instance addr="0x25021642" reg_inst="23"/>
+ <instance addr="0x26028642" reg_inst="24"/>
+ <instance addr="0x26024642" reg_inst="25"/>
+ <instance addr="0x26022642" reg_inst="26"/>
+ <instance addr="0x26021642" reg_inst="27"/>
+ <instance addr="0x27028642" reg_inst="28"/>
+ <instance addr="0x27024642" reg_inst="29"/>
+ <instance addr="0x27022642" reg_inst="30"/>
+ <instance addr="0x27021642" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT3">
+ <instance addr="0x20028643" reg_inst="0"/>
+ <instance addr="0x20024643" reg_inst="1"/>
+ <instance addr="0x20022643" reg_inst="2"/>
+ <instance addr="0x20021643" reg_inst="3"/>
+ <instance addr="0x21028643" reg_inst="4"/>
+ <instance addr="0x21024643" reg_inst="5"/>
+ <instance addr="0x21022643" reg_inst="6"/>
+ <instance addr="0x21021643" reg_inst="7"/>
+ <instance addr="0x22028643" reg_inst="8"/>
+ <instance addr="0x22024643" reg_inst="9"/>
+ <instance addr="0x22022643" reg_inst="10"/>
+ <instance addr="0x22021643" reg_inst="11"/>
+ <instance addr="0x23028643" reg_inst="12"/>
+ <instance addr="0x23024643" reg_inst="13"/>
+ <instance addr="0x23022643" reg_inst="14"/>
+ <instance addr="0x23021643" reg_inst="15"/>
+ <instance addr="0x24028643" reg_inst="16"/>
+ <instance addr="0x24024643" reg_inst="17"/>
+ <instance addr="0x24022643" reg_inst="18"/>
+ <instance addr="0x24021643" reg_inst="19"/>
+ <instance addr="0x25028643" reg_inst="20"/>
+ <instance addr="0x25024643" reg_inst="21"/>
+ <instance addr="0x25022643" reg_inst="22"/>
+ <instance addr="0x25021643" reg_inst="23"/>
+ <instance addr="0x26028643" reg_inst="24"/>
+ <instance addr="0x26024643" reg_inst="25"/>
+ <instance addr="0x26022643" reg_inst="26"/>
+ <instance addr="0x26021643" reg_inst="27"/>
+ <instance addr="0x27028643" reg_inst="28"/>
+ <instance addr="0x27024643" reg_inst="29"/>
+ <instance addr="0x27022643" reg_inst="30"/>
+ <instance addr="0x27021643" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG0">
+ <instance addr="0x200286C0" reg_inst="0"/>
+ <instance addr="0x200246C0" reg_inst="1"/>
+ <instance addr="0x200226C0" reg_inst="2"/>
+ <instance addr="0x200216C0" reg_inst="3"/>
+ <instance addr="0x210286C0" reg_inst="4"/>
+ <instance addr="0x210246C0" reg_inst="5"/>
+ <instance addr="0x210226C0" reg_inst="6"/>
+ <instance addr="0x210216C0" reg_inst="7"/>
+ <instance addr="0x220286C0" reg_inst="8"/>
+ <instance addr="0x220246C0" reg_inst="9"/>
+ <instance addr="0x220226C0" reg_inst="10"/>
+ <instance addr="0x220216C0" reg_inst="11"/>
+ <instance addr="0x230286C0" reg_inst="12"/>
+ <instance addr="0x230246C0" reg_inst="13"/>
+ <instance addr="0x230226C0" reg_inst="14"/>
+ <instance addr="0x230216C0" reg_inst="15"/>
+ <instance addr="0x240286C0" reg_inst="16"/>
+ <instance addr="0x240246C0" reg_inst="17"/>
+ <instance addr="0x240226C0" reg_inst="18"/>
+ <instance addr="0x240216C0" reg_inst="19"/>
+ <instance addr="0x250286C0" reg_inst="20"/>
+ <instance addr="0x250246C0" reg_inst="21"/>
+ <instance addr="0x250226C0" reg_inst="22"/>
+ <instance addr="0x250216C0" reg_inst="23"/>
+ <instance addr="0x260286C0" reg_inst="24"/>
+ <instance addr="0x260246C0" reg_inst="25"/>
+ <instance addr="0x260226C0" reg_inst="26"/>
+ <instance addr="0x260216C0" reg_inst="27"/>
+ <instance addr="0x270286C0" reg_inst="28"/>
+ <instance addr="0x270246C0" reg_inst="29"/>
+ <instance addr="0x270226C0" reg_inst="30"/>
+ <instance addr="0x270216C0" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG1">
+ <instance addr="0x200286C1" reg_inst="0"/>
+ <instance addr="0x200246C1" reg_inst="1"/>
+ <instance addr="0x200226C1" reg_inst="2"/>
+ <instance addr="0x200216C1" reg_inst="3"/>
+ <instance addr="0x210286C1" reg_inst="4"/>
+ <instance addr="0x210246C1" reg_inst="5"/>
+ <instance addr="0x210226C1" reg_inst="6"/>
+ <instance addr="0x210216C1" reg_inst="7"/>
+ <instance addr="0x220286C1" reg_inst="8"/>
+ <instance addr="0x220246C1" reg_inst="9"/>
+ <instance addr="0x220226C1" reg_inst="10"/>
+ <instance addr="0x220216C1" reg_inst="11"/>
+ <instance addr="0x230286C1" reg_inst="12"/>
+ <instance addr="0x230246C1" reg_inst="13"/>
+ <instance addr="0x230226C1" reg_inst="14"/>
+ <instance addr="0x230216C1" reg_inst="15"/>
+ <instance addr="0x240286C1" reg_inst="16"/>
+ <instance addr="0x240246C1" reg_inst="17"/>
+ <instance addr="0x240226C1" reg_inst="18"/>
+ <instance addr="0x240216C1" reg_inst="19"/>
+ <instance addr="0x250286C1" reg_inst="20"/>
+ <instance addr="0x250246C1" reg_inst="21"/>
+ <instance addr="0x250226C1" reg_inst="22"/>
+ <instance addr="0x250216C1" reg_inst="23"/>
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+ <instance addr="0x260246C1" reg_inst="25"/>
+ <instance addr="0x260226C1" reg_inst="26"/>
+ <instance addr="0x260216C1" reg_inst="27"/>
+ <instance addr="0x270286C1" reg_inst="28"/>
+ <instance addr="0x270246C1" reg_inst="29"/>
+ <instance addr="0x270226C1" reg_inst="30"/>
+ <instance addr="0x270216C1" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG2">
+ <instance addr="0x200286C2" reg_inst="0"/>
+ <instance addr="0x200246C2" reg_inst="1"/>
+ <instance addr="0x200226C2" reg_inst="2"/>
+ <instance addr="0x200216C2" reg_inst="3"/>
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+ <instance addr="0x210246C2" reg_inst="5"/>
+ <instance addr="0x210226C2" reg_inst="6"/>
+ <instance addr="0x210216C2" reg_inst="7"/>
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+ <instance addr="0x220226C2" reg_inst="10"/>
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+ <instance addr="0x250226C2" reg_inst="22"/>
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+ <instance addr="0x260226C2" reg_inst="26"/>
+ <instance addr="0x260216C2" reg_inst="27"/>
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+ <instance addr="0x270226C2" reg_inst="30"/>
+ <instance addr="0x270216C2" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG3">
+ <instance addr="0x200286C3" reg_inst="0"/>
+ <instance addr="0x200246C3" reg_inst="1"/>
+ <instance addr="0x200226C3" reg_inst="2"/>
+ <instance addr="0x200216C3" reg_inst="3"/>
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+ <instance addr="0x210246C3" reg_inst="5"/>
+ <instance addr="0x210226C3" reg_inst="6"/>
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+ <instance addr="0x250226C3" reg_inst="22"/>
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+ <instance addr="0x260226C3" reg_inst="26"/>
+ <instance addr="0x260216C3" reg_inst="27"/>
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+ <instance addr="0x270226C3" reg_inst="30"/>
+ <instance addr="0x270216C3" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG4">
+ <instance addr="0x200286C4" reg_inst="0"/>
+ <instance addr="0x200246C4" reg_inst="1"/>
+ <instance addr="0x200226C4" reg_inst="2"/>
+ <instance addr="0x200216C4" reg_inst="3"/>
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+ <instance addr="0x250226C4" reg_inst="22"/>
+ <instance addr="0x250216C4" reg_inst="23"/>
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+ <instance addr="0x270226C4" reg_inst="30"/>
+ <instance addr="0x270216C4" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG5">
+ <instance addr="0x200286C5" reg_inst="0"/>
+ <instance addr="0x200246C5" reg_inst="1"/>
+ <instance addr="0x200226C5" reg_inst="2"/>
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+ <instance addr="0x270226C5" reg_inst="30"/>
+ <instance addr="0x270216C5" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG6">
+ <instance addr="0x200286C6" reg_inst="0"/>
+ <instance addr="0x200246C6" reg_inst="1"/>
+ <instance addr="0x200226C6" reg_inst="2"/>
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+ <instance addr="0x270226C6" reg_inst="30"/>
+ <instance addr="0x270216C6" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG7">
+ <instance addr="0x200286C7" reg_inst="0"/>
+ <instance addr="0x200246C7" reg_inst="1"/>
+ <instance addr="0x200226C7" reg_inst="2"/>
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+ <instance addr="0x270226C7" reg_inst="30"/>
+ <instance addr="0x270216C7" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG8">
+ <instance addr="0x200286C8" reg_inst="0"/>
+ <instance addr="0x200246C8" reg_inst="1"/>
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+ <instance addr="0x270226C8" reg_inst="30"/>
+ <instance addr="0x270216C8" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG9">
+ <instance addr="0x200286C9" reg_inst="0"/>
+ <instance addr="0x200246C9" reg_inst="1"/>
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+ <instance addr="0x270226C9" reg_inst="30"/>
+ <instance addr="0x270216C9" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG10">
+ <instance addr="0x200286CA" reg_inst="0"/>
+ <instance addr="0x200246CA" reg_inst="1"/>
+ <instance addr="0x200226CA" reg_inst="2"/>
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+ <instance addr="0x270226CA" reg_inst="30"/>
+ <instance addr="0x270216CA" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG11">
+ <instance addr="0x200286CB" reg_inst="0"/>
+ <instance addr="0x200246CB" reg_inst="1"/>
+ <instance addr="0x200226CB" reg_inst="2"/>
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+ <instance addr="0x270226CB" reg_inst="30"/>
+ <instance addr="0x270216CB" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG12">
+ <instance addr="0x200286CC" reg_inst="0"/>
+ <instance addr="0x200246CC" reg_inst="1"/>
+ <instance addr="0x200226CC" reg_inst="2"/>
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+ <instance addr="0x240246CC" reg_inst="17"/>
+ <instance addr="0x240226CC" reg_inst="18"/>
+ <instance addr="0x240216CC" reg_inst="19"/>
+ <instance addr="0x250286CC" reg_inst="20"/>
+ <instance addr="0x250246CC" reg_inst="21"/>
+ <instance addr="0x250226CC" reg_inst="22"/>
+ <instance addr="0x250216CC" reg_inst="23"/>
+ <instance addr="0x260286CC" reg_inst="24"/>
+ <instance addr="0x260246CC" reg_inst="25"/>
+ <instance addr="0x260226CC" reg_inst="26"/>
+ <instance addr="0x260216CC" reg_inst="27"/>
+ <instance addr="0x270286CC" reg_inst="28"/>
+ <instance addr="0x270246CC" reg_inst="29"/>
+ <instance addr="0x270226CC" reg_inst="30"/>
+ <instance addr="0x270216CC" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG13">
+ <instance addr="0x200286CD" reg_inst="0"/>
+ <instance addr="0x200246CD" reg_inst="1"/>
+ <instance addr="0x200226CD" reg_inst="2"/>
+ <instance addr="0x200216CD" reg_inst="3"/>
+ <instance addr="0x210286CD" reg_inst="4"/>
+ <instance addr="0x210246CD" reg_inst="5"/>
+ <instance addr="0x210226CD" reg_inst="6"/>
+ <instance addr="0x210216CD" reg_inst="7"/>
+ <instance addr="0x220286CD" reg_inst="8"/>
+ <instance addr="0x220246CD" reg_inst="9"/>
+ <instance addr="0x220226CD" reg_inst="10"/>
+ <instance addr="0x220216CD" reg_inst="11"/>
+ <instance addr="0x230286CD" reg_inst="12"/>
+ <instance addr="0x230246CD" reg_inst="13"/>
+ <instance addr="0x230226CD" reg_inst="14"/>
+ <instance addr="0x230216CD" reg_inst="15"/>
+ <instance addr="0x240286CD" reg_inst="16"/>
+ <instance addr="0x240246CD" reg_inst="17"/>
+ <instance addr="0x240226CD" reg_inst="18"/>
+ <instance addr="0x240216CD" reg_inst="19"/>
+ <instance addr="0x250286CD" reg_inst="20"/>
+ <instance addr="0x250246CD" reg_inst="21"/>
+ <instance addr="0x250226CD" reg_inst="22"/>
+ <instance addr="0x250216CD" reg_inst="23"/>
+ <instance addr="0x260286CD" reg_inst="24"/>
+ <instance addr="0x260246CD" reg_inst="25"/>
+ <instance addr="0x260226CD" reg_inst="26"/>
+ <instance addr="0x260216CD" reg_inst="27"/>
+ <instance addr="0x270286CD" reg_inst="28"/>
+ <instance addr="0x270246CD" reg_inst="29"/>
+ <instance addr="0x270226CD" reg_inst="30"/>
+ <instance addr="0x270216CD" reg_inst="31"/>
+ </register>
+ <capture_group node_inst="0:31">
+ <capture_register reg_name="PC_FIR_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="THRCTL_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="VSU_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="TFAC_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT0" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT1" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT2" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT3" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT0" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT1" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT2" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT3" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG0" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG1" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG2" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG3" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG4" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG5" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG6" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG7" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG8" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG9" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG10" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG11" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG12" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG13" reg_inst= "0:31" />
+ </capture_group>
<rule attn_type="CS" node_inst="0:31">
<!-- FIR & ~MASK & ~ACT0 & ~ACT1 -->
<expr type="and">
diff --git a/xml/p10/node_eq_core_fir_p10_10.xml b/xml/p10/node_eq_core_fir_p10_10.xml
index 4125951..d9d5364 100644
--- a/xml/p10/node_eq_core_fir_p10_10.xml
+++ b/xml/p10/node_eq_core_fir_p10_10.xml
@@ -170,6 +170,918 @@
<instance addr="0x27022448" reg_inst="30"/>
<instance addr="0x27021448" reg_inst="31"/>
</register>
+ <register name="PC_FIR_HOLD_OUT">
+ <instance addr="0x20028451" reg_inst="0"/>
+ <instance addr="0x20024451" reg_inst="1"/>
+ <instance addr="0x20022451" reg_inst="2"/>
+ <instance addr="0x20021451" reg_inst="3"/>
+ <instance addr="0x21028451" reg_inst="4"/>
+ <instance addr="0x21024451" reg_inst="5"/>
+ <instance addr="0x21022451" reg_inst="6"/>
+ <instance addr="0x21021451" reg_inst="7"/>
+ <instance addr="0x22028451" reg_inst="8"/>
+ <instance addr="0x22024451" reg_inst="9"/>
+ <instance addr="0x22022451" reg_inst="10"/>
+ <instance addr="0x22021451" reg_inst="11"/>
+ <instance addr="0x23028451" reg_inst="12"/>
+ <instance addr="0x23024451" reg_inst="13"/>
+ <instance addr="0x23022451" reg_inst="14"/>
+ <instance addr="0x23021451" reg_inst="15"/>
+ <instance addr="0x24028451" reg_inst="16"/>
+ <instance addr="0x24024451" reg_inst="17"/>
+ <instance addr="0x24022451" reg_inst="18"/>
+ <instance addr="0x24021451" reg_inst="19"/>
+ <instance addr="0x25028451" reg_inst="20"/>
+ <instance addr="0x25024451" reg_inst="21"/>
+ <instance addr="0x25022451" reg_inst="22"/>
+ <instance addr="0x25021451" reg_inst="23"/>
+ <instance addr="0x26028451" reg_inst="24"/>
+ <instance addr="0x26024451" reg_inst="25"/>
+ <instance addr="0x26022451" reg_inst="26"/>
+ <instance addr="0x26021451" reg_inst="27"/>
+ <instance addr="0x27028451" reg_inst="28"/>
+ <instance addr="0x27024451" reg_inst="29"/>
+ <instance addr="0x27022451" reg_inst="30"/>
+ <instance addr="0x27021451" reg_inst="31"/>
+ </register>
+ <register name="THRCTL_HOLD_OUT">
+ <instance addr="0x20028455" reg_inst="0"/>
+ <instance addr="0x20024455" reg_inst="1"/>
+ <instance addr="0x20022455" reg_inst="2"/>
+ <instance addr="0x20021455" reg_inst="3"/>
+ <instance addr="0x21028455" reg_inst="4"/>
+ <instance addr="0x21024455" reg_inst="5"/>
+ <instance addr="0x21022455" reg_inst="6"/>
+ <instance addr="0x21021455" reg_inst="7"/>
+ <instance addr="0x22028455" reg_inst="8"/>
+ <instance addr="0x22024455" reg_inst="9"/>
+ <instance addr="0x22022455" reg_inst="10"/>
+ <instance addr="0x22021455" reg_inst="11"/>
+ <instance addr="0x23028455" reg_inst="12"/>
+ <instance addr="0x23024455" reg_inst="13"/>
+ <instance addr="0x23022455" reg_inst="14"/>
+ <instance addr="0x23021455" reg_inst="15"/>
+ <instance addr="0x24028455" reg_inst="16"/>
+ <instance addr="0x24024455" reg_inst="17"/>
+ <instance addr="0x24022455" reg_inst="18"/>
+ <instance addr="0x24021455" reg_inst="19"/>
+ <instance addr="0x25028455" reg_inst="20"/>
+ <instance addr="0x25024455" reg_inst="21"/>
+ <instance addr="0x25022455" reg_inst="22"/>
+ <instance addr="0x25021455" reg_inst="23"/>
+ <instance addr="0x26028455" reg_inst="24"/>
+ <instance addr="0x26024455" reg_inst="25"/>
+ <instance addr="0x26022455" reg_inst="26"/>
+ <instance addr="0x26021455" reg_inst="27"/>
+ <instance addr="0x27028455" reg_inst="28"/>
+ <instance addr="0x27024455" reg_inst="29"/>
+ <instance addr="0x27022455" reg_inst="30"/>
+ <instance addr="0x27021455" reg_inst="31"/>
+ </register>
+ <register name="VSU_HOLD_OUT">
+ <instance addr="0x200284B6" reg_inst="0"/>
+ <instance addr="0x200244B6" reg_inst="1"/>
+ <instance addr="0x200224B6" reg_inst="2"/>
+ <instance addr="0x200214B6" reg_inst="3"/>
+ <instance addr="0x210284B6" reg_inst="4"/>
+ <instance addr="0x210244B6" reg_inst="5"/>
+ <instance addr="0x210224B6" reg_inst="6"/>
+ <instance addr="0x210214B6" reg_inst="7"/>
+ <instance addr="0x220284B6" reg_inst="8"/>
+ <instance addr="0x220244B6" reg_inst="9"/>
+ <instance addr="0x220224B6" reg_inst="10"/>
+ <instance addr="0x220214B6" reg_inst="11"/>
+ <instance addr="0x230284B6" reg_inst="12"/>
+ <instance addr="0x230244B6" reg_inst="13"/>
+ <instance addr="0x230224B6" reg_inst="14"/>
+ <instance addr="0x230214B6" reg_inst="15"/>
+ <instance addr="0x240284B6" reg_inst="16"/>
+ <instance addr="0x240244B6" reg_inst="17"/>
+ <instance addr="0x240224B6" reg_inst="18"/>
+ <instance addr="0x240214B6" reg_inst="19"/>
+ <instance addr="0x250284B6" reg_inst="20"/>
+ <instance addr="0x250244B6" reg_inst="21"/>
+ <instance addr="0x250224B6" reg_inst="22"/>
+ <instance addr="0x250214B6" reg_inst="23"/>
+ <instance addr="0x260284B6" reg_inst="24"/>
+ <instance addr="0x260244B6" reg_inst="25"/>
+ <instance addr="0x260224B6" reg_inst="26"/>
+ <instance addr="0x260214B6" reg_inst="27"/>
+ <instance addr="0x270284B6" reg_inst="28"/>
+ <instance addr="0x270244B6" reg_inst="29"/>
+ <instance addr="0x270224B6" reg_inst="30"/>
+ <instance addr="0x270214B6" reg_inst="31"/>
+ </register>
+ <register name="TFAC_HOLD_OUT">
+ <instance addr="0x200284B7" reg_inst="0"/>
+ <instance addr="0x200244B7" reg_inst="1"/>
+ <instance addr="0x200224B7" reg_inst="2"/>
+ <instance addr="0x200214B7" reg_inst="3"/>
+ <instance addr="0x210284B7" reg_inst="4"/>
+ <instance addr="0x210244B7" reg_inst="5"/>
+ <instance addr="0x210224B7" reg_inst="6"/>
+ <instance addr="0x210214B7" reg_inst="7"/>
+ <instance addr="0x220284B7" reg_inst="8"/>
+ <instance addr="0x220244B7" reg_inst="9"/>
+ <instance addr="0x220224B7" reg_inst="10"/>
+ <instance addr="0x220214B7" reg_inst="11"/>
+ <instance addr="0x230284B7" reg_inst="12"/>
+ <instance addr="0x230244B7" reg_inst="13"/>
+ <instance addr="0x230224B7" reg_inst="14"/>
+ <instance addr="0x230214B7" reg_inst="15"/>
+ <instance addr="0x240284B7" reg_inst="16"/>
+ <instance addr="0x240244B7" reg_inst="17"/>
+ <instance addr="0x240224B7" reg_inst="18"/>
+ <instance addr="0x240214B7" reg_inst="19"/>
+ <instance addr="0x250284B7" reg_inst="20"/>
+ <instance addr="0x250244B7" reg_inst="21"/>
+ <instance addr="0x250224B7" reg_inst="22"/>
+ <instance addr="0x250214B7" reg_inst="23"/>
+ <instance addr="0x260284B7" reg_inst="24"/>
+ <instance addr="0x260244B7" reg_inst="25"/>
+ <instance addr="0x260224B7" reg_inst="26"/>
+ <instance addr="0x260214B7" reg_inst="27"/>
+ <instance addr="0x270284B7" reg_inst="28"/>
+ <instance addr="0x270244B7" reg_inst="29"/>
+ <instance addr="0x270224B7" reg_inst="30"/>
+ <instance addr="0x270214B7" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT0">
+ <instance addr="0x20028600" reg_inst="0"/>
+ <instance addr="0x20024600" reg_inst="1"/>
+ <instance addr="0x20022600" reg_inst="2"/>
+ <instance addr="0x20021600" reg_inst="3"/>
+ <instance addr="0x21028600" reg_inst="4"/>
+ <instance addr="0x21024600" reg_inst="5"/>
+ <instance addr="0x21022600" reg_inst="6"/>
+ <instance addr="0x21021600" reg_inst="7"/>
+ <instance addr="0x22028600" reg_inst="8"/>
+ <instance addr="0x22024600" reg_inst="9"/>
+ <instance addr="0x22022600" reg_inst="10"/>
+ <instance addr="0x22021600" reg_inst="11"/>
+ <instance addr="0x23028600" reg_inst="12"/>
+ <instance addr="0x23024600" reg_inst="13"/>
+ <instance addr="0x23022600" reg_inst="14"/>
+ <instance addr="0x23021600" reg_inst="15"/>
+ <instance addr="0x24028600" reg_inst="16"/>
+ <instance addr="0x24024600" reg_inst="17"/>
+ <instance addr="0x24022600" reg_inst="18"/>
+ <instance addr="0x24021600" reg_inst="19"/>
+ <instance addr="0x25028600" reg_inst="20"/>
+ <instance addr="0x25024600" reg_inst="21"/>
+ <instance addr="0x25022600" reg_inst="22"/>
+ <instance addr="0x25021600" reg_inst="23"/>
+ <instance addr="0x26028600" reg_inst="24"/>
+ <instance addr="0x26024600" reg_inst="25"/>
+ <instance addr="0x26022600" reg_inst="26"/>
+ <instance addr="0x26021600" reg_inst="27"/>
+ <instance addr="0x27028600" reg_inst="28"/>
+ <instance addr="0x27024600" reg_inst="29"/>
+ <instance addr="0x27022600" reg_inst="30"/>
+ <instance addr="0x27021600" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT1">
+ <instance addr="0x20028601" reg_inst="0"/>
+ <instance addr="0x20024601" reg_inst="1"/>
+ <instance addr="0x20022601" reg_inst="2"/>
+ <instance addr="0x20021601" reg_inst="3"/>
+ <instance addr="0x21028601" reg_inst="4"/>
+ <instance addr="0x21024601" reg_inst="5"/>
+ <instance addr="0x21022601" reg_inst="6"/>
+ <instance addr="0x21021601" reg_inst="7"/>
+ <instance addr="0x22028601" reg_inst="8"/>
+ <instance addr="0x22024601" reg_inst="9"/>
+ <instance addr="0x22022601" reg_inst="10"/>
+ <instance addr="0x22021601" reg_inst="11"/>
+ <instance addr="0x23028601" reg_inst="12"/>
+ <instance addr="0x23024601" reg_inst="13"/>
+ <instance addr="0x23022601" reg_inst="14"/>
+ <instance addr="0x23021601" reg_inst="15"/>
+ <instance addr="0x24028601" reg_inst="16"/>
+ <instance addr="0x24024601" reg_inst="17"/>
+ <instance addr="0x24022601" reg_inst="18"/>
+ <instance addr="0x24021601" reg_inst="19"/>
+ <instance addr="0x25028601" reg_inst="20"/>
+ <instance addr="0x25024601" reg_inst="21"/>
+ <instance addr="0x25022601" reg_inst="22"/>
+ <instance addr="0x25021601" reg_inst="23"/>
+ <instance addr="0x26028601" reg_inst="24"/>
+ <instance addr="0x26024601" reg_inst="25"/>
+ <instance addr="0x26022601" reg_inst="26"/>
+ <instance addr="0x26021601" reg_inst="27"/>
+ <instance addr="0x27028601" reg_inst="28"/>
+ <instance addr="0x27024601" reg_inst="29"/>
+ <instance addr="0x27022601" reg_inst="30"/>
+ <instance addr="0x27021601" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT2">
+ <instance addr="0x20028602" reg_inst="0"/>
+ <instance addr="0x20024602" reg_inst="1"/>
+ <instance addr="0x20022602" reg_inst="2"/>
+ <instance addr="0x20021602" reg_inst="3"/>
+ <instance addr="0x21028602" reg_inst="4"/>
+ <instance addr="0x21024602" reg_inst="5"/>
+ <instance addr="0x21022602" reg_inst="6"/>
+ <instance addr="0x21021602" reg_inst="7"/>
+ <instance addr="0x22028602" reg_inst="8"/>
+ <instance addr="0x22024602" reg_inst="9"/>
+ <instance addr="0x22022602" reg_inst="10"/>
+ <instance addr="0x22021602" reg_inst="11"/>
+ <instance addr="0x23028602" reg_inst="12"/>
+ <instance addr="0x23024602" reg_inst="13"/>
+ <instance addr="0x23022602" reg_inst="14"/>
+ <instance addr="0x23021602" reg_inst="15"/>
+ <instance addr="0x24028602" reg_inst="16"/>
+ <instance addr="0x24024602" reg_inst="17"/>
+ <instance addr="0x24022602" reg_inst="18"/>
+ <instance addr="0x24021602" reg_inst="19"/>
+ <instance addr="0x25028602" reg_inst="20"/>
+ <instance addr="0x25024602" reg_inst="21"/>
+ <instance addr="0x25022602" reg_inst="22"/>
+ <instance addr="0x25021602" reg_inst="23"/>
+ <instance addr="0x26028602" reg_inst="24"/>
+ <instance addr="0x26024602" reg_inst="25"/>
+ <instance addr="0x26022602" reg_inst="26"/>
+ <instance addr="0x26021602" reg_inst="27"/>
+ <instance addr="0x27028602" reg_inst="28"/>
+ <instance addr="0x27024602" reg_inst="29"/>
+ <instance addr="0x27022602" reg_inst="30"/>
+ <instance addr="0x27021602" reg_inst="31"/>
+ </register>
+ <register name="IFU_HOLD_OUT3">
+ <instance addr="0x20028603" reg_inst="0"/>
+ <instance addr="0x20024603" reg_inst="1"/>
+ <instance addr="0x20022603" reg_inst="2"/>
+ <instance addr="0x20021603" reg_inst="3"/>
+ <instance addr="0x21028603" reg_inst="4"/>
+ <instance addr="0x21024603" reg_inst="5"/>
+ <instance addr="0x21022603" reg_inst="6"/>
+ <instance addr="0x21021603" reg_inst="7"/>
+ <instance addr="0x22028603" reg_inst="8"/>
+ <instance addr="0x22024603" reg_inst="9"/>
+ <instance addr="0x22022603" reg_inst="10"/>
+ <instance addr="0x22021603" reg_inst="11"/>
+ <instance addr="0x23028603" reg_inst="12"/>
+ <instance addr="0x23024603" reg_inst="13"/>
+ <instance addr="0x23022603" reg_inst="14"/>
+ <instance addr="0x23021603" reg_inst="15"/>
+ <instance addr="0x24028603" reg_inst="16"/>
+ <instance addr="0x24024603" reg_inst="17"/>
+ <instance addr="0x24022603" reg_inst="18"/>
+ <instance addr="0x24021603" reg_inst="19"/>
+ <instance addr="0x25028603" reg_inst="20"/>
+ <instance addr="0x25024603" reg_inst="21"/>
+ <instance addr="0x25022603" reg_inst="22"/>
+ <instance addr="0x25021603" reg_inst="23"/>
+ <instance addr="0x26028603" reg_inst="24"/>
+ <instance addr="0x26024603" reg_inst="25"/>
+ <instance addr="0x26022603" reg_inst="26"/>
+ <instance addr="0x26021603" reg_inst="27"/>
+ <instance addr="0x27028603" reg_inst="28"/>
+ <instance addr="0x27024603" reg_inst="29"/>
+ <instance addr="0x27022603" reg_inst="30"/>
+ <instance addr="0x27021603" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT0">
+ <instance addr="0x20028640" reg_inst="0"/>
+ <instance addr="0x20024640" reg_inst="1"/>
+ <instance addr="0x20022640" reg_inst="2"/>
+ <instance addr="0x20021640" reg_inst="3"/>
+ <instance addr="0x21028640" reg_inst="4"/>
+ <instance addr="0x21024640" reg_inst="5"/>
+ <instance addr="0x21022640" reg_inst="6"/>
+ <instance addr="0x21021640" reg_inst="7"/>
+ <instance addr="0x22028640" reg_inst="8"/>
+ <instance addr="0x22024640" reg_inst="9"/>
+ <instance addr="0x22022640" reg_inst="10"/>
+ <instance addr="0x22021640" reg_inst="11"/>
+ <instance addr="0x23028640" reg_inst="12"/>
+ <instance addr="0x23024640" reg_inst="13"/>
+ <instance addr="0x23022640" reg_inst="14"/>
+ <instance addr="0x23021640" reg_inst="15"/>
+ <instance addr="0x24028640" reg_inst="16"/>
+ <instance addr="0x24024640" reg_inst="17"/>
+ <instance addr="0x24022640" reg_inst="18"/>
+ <instance addr="0x24021640" reg_inst="19"/>
+ <instance addr="0x25028640" reg_inst="20"/>
+ <instance addr="0x25024640" reg_inst="21"/>
+ <instance addr="0x25022640" reg_inst="22"/>
+ <instance addr="0x25021640" reg_inst="23"/>
+ <instance addr="0x26028640" reg_inst="24"/>
+ <instance addr="0x26024640" reg_inst="25"/>
+ <instance addr="0x26022640" reg_inst="26"/>
+ <instance addr="0x26021640" reg_inst="27"/>
+ <instance addr="0x27028640" reg_inst="28"/>
+ <instance addr="0x27024640" reg_inst="29"/>
+ <instance addr="0x27022640" reg_inst="30"/>
+ <instance addr="0x27021640" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT1">
+ <instance addr="0x20028641" reg_inst="0"/>
+ <instance addr="0x20024641" reg_inst="1"/>
+ <instance addr="0x20022641" reg_inst="2"/>
+ <instance addr="0x20021641" reg_inst="3"/>
+ <instance addr="0x21028641" reg_inst="4"/>
+ <instance addr="0x21024641" reg_inst="5"/>
+ <instance addr="0x21022641" reg_inst="6"/>
+ <instance addr="0x21021641" reg_inst="7"/>
+ <instance addr="0x22028641" reg_inst="8"/>
+ <instance addr="0x22024641" reg_inst="9"/>
+ <instance addr="0x22022641" reg_inst="10"/>
+ <instance addr="0x22021641" reg_inst="11"/>
+ <instance addr="0x23028641" reg_inst="12"/>
+ <instance addr="0x23024641" reg_inst="13"/>
+ <instance addr="0x23022641" reg_inst="14"/>
+ <instance addr="0x23021641" reg_inst="15"/>
+ <instance addr="0x24028641" reg_inst="16"/>
+ <instance addr="0x24024641" reg_inst="17"/>
+ <instance addr="0x24022641" reg_inst="18"/>
+ <instance addr="0x24021641" reg_inst="19"/>
+ <instance addr="0x25028641" reg_inst="20"/>
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+ <instance addr="0x25022641" reg_inst="22"/>
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+ <instance addr="0x26028641" reg_inst="24"/>
+ <instance addr="0x26024641" reg_inst="25"/>
+ <instance addr="0x26022641" reg_inst="26"/>
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+ <instance addr="0x27024641" reg_inst="29"/>
+ <instance addr="0x27022641" reg_inst="30"/>
+ <instance addr="0x27021641" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT2">
+ <instance addr="0x20028642" reg_inst="0"/>
+ <instance addr="0x20024642" reg_inst="1"/>
+ <instance addr="0x20022642" reg_inst="2"/>
+ <instance addr="0x20021642" reg_inst="3"/>
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+ <instance addr="0x27022642" reg_inst="30"/>
+ <instance addr="0x27021642" reg_inst="31"/>
+ </register>
+ <register name="ISU_HOLD_OUT3">
+ <instance addr="0x20028643" reg_inst="0"/>
+ <instance addr="0x20024643" reg_inst="1"/>
+ <instance addr="0x20022643" reg_inst="2"/>
+ <instance addr="0x20021643" reg_inst="3"/>
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+ <instance addr="0x27022643" reg_inst="30"/>
+ <instance addr="0x27021643" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG0">
+ <instance addr="0x200286C0" reg_inst="0"/>
+ <instance addr="0x200246C0" reg_inst="1"/>
+ <instance addr="0x200226C0" reg_inst="2"/>
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+ <instance addr="0x270226C0" reg_inst="30"/>
+ <instance addr="0x270216C0" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG1">
+ <instance addr="0x200286C1" reg_inst="0"/>
+ <instance addr="0x200246C1" reg_inst="1"/>
+ <instance addr="0x200226C1" reg_inst="2"/>
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+ <instance addr="0x270226C1" reg_inst="30"/>
+ <instance addr="0x270216C1" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG2">
+ <instance addr="0x200286C2" reg_inst="0"/>
+ <instance addr="0x200246C2" reg_inst="1"/>
+ <instance addr="0x200226C2" reg_inst="2"/>
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+ <instance addr="0x270226C2" reg_inst="30"/>
+ <instance addr="0x270216C2" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG3">
+ <instance addr="0x200286C3" reg_inst="0"/>
+ <instance addr="0x200246C3" reg_inst="1"/>
+ <instance addr="0x200226C3" reg_inst="2"/>
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+ <instance addr="0x270226C3" reg_inst="30"/>
+ <instance addr="0x270216C3" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG4">
+ <instance addr="0x200286C4" reg_inst="0"/>
+ <instance addr="0x200246C4" reg_inst="1"/>
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+ </register>
+ <register name="LSU_HOLD_OUT_REG5">
+ <instance addr="0x200286C5" reg_inst="0"/>
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+ </register>
+ <register name="LSU_HOLD_OUT_REG6">
+ <instance addr="0x200286C6" reg_inst="0"/>
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+ </register>
+ <register name="LSU_HOLD_OUT_REG7">
+ <instance addr="0x200286C7" reg_inst="0"/>
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+ <instance addr="0x270216C7" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG8">
+ <instance addr="0x200286C8" reg_inst="0"/>
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+ </register>
+ <register name="LSU_HOLD_OUT_REG9">
+ <instance addr="0x200286C9" reg_inst="0"/>
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+ <instance addr="0x260216C9" reg_inst="27"/>
+ <instance addr="0x270286C9" reg_inst="28"/>
+ <instance addr="0x270246C9" reg_inst="29"/>
+ <instance addr="0x270226C9" reg_inst="30"/>
+ <instance addr="0x270216C9" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG10">
+ <instance addr="0x200286CA" reg_inst="0"/>
+ <instance addr="0x200246CA" reg_inst="1"/>
+ <instance addr="0x200226CA" reg_inst="2"/>
+ <instance addr="0x200216CA" reg_inst="3"/>
+ <instance addr="0x210286CA" reg_inst="4"/>
+ <instance addr="0x210246CA" reg_inst="5"/>
+ <instance addr="0x210226CA" reg_inst="6"/>
+ <instance addr="0x210216CA" reg_inst="7"/>
+ <instance addr="0x220286CA" reg_inst="8"/>
+ <instance addr="0x220246CA" reg_inst="9"/>
+ <instance addr="0x220226CA" reg_inst="10"/>
+ <instance addr="0x220216CA" reg_inst="11"/>
+ <instance addr="0x230286CA" reg_inst="12"/>
+ <instance addr="0x230246CA" reg_inst="13"/>
+ <instance addr="0x230226CA" reg_inst="14"/>
+ <instance addr="0x230216CA" reg_inst="15"/>
+ <instance addr="0x240286CA" reg_inst="16"/>
+ <instance addr="0x240246CA" reg_inst="17"/>
+ <instance addr="0x240226CA" reg_inst="18"/>
+ <instance addr="0x240216CA" reg_inst="19"/>
+ <instance addr="0x250286CA" reg_inst="20"/>
+ <instance addr="0x250246CA" reg_inst="21"/>
+ <instance addr="0x250226CA" reg_inst="22"/>
+ <instance addr="0x250216CA" reg_inst="23"/>
+ <instance addr="0x260286CA" reg_inst="24"/>
+ <instance addr="0x260246CA" reg_inst="25"/>
+ <instance addr="0x260226CA" reg_inst="26"/>
+ <instance addr="0x260216CA" reg_inst="27"/>
+ <instance addr="0x270286CA" reg_inst="28"/>
+ <instance addr="0x270246CA" reg_inst="29"/>
+ <instance addr="0x270226CA" reg_inst="30"/>
+ <instance addr="0x270216CA" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG11">
+ <instance addr="0x200286CB" reg_inst="0"/>
+ <instance addr="0x200246CB" reg_inst="1"/>
+ <instance addr="0x200226CB" reg_inst="2"/>
+ <instance addr="0x200216CB" reg_inst="3"/>
+ <instance addr="0x210286CB" reg_inst="4"/>
+ <instance addr="0x210246CB" reg_inst="5"/>
+ <instance addr="0x210226CB" reg_inst="6"/>
+ <instance addr="0x210216CB" reg_inst="7"/>
+ <instance addr="0x220286CB" reg_inst="8"/>
+ <instance addr="0x220246CB" reg_inst="9"/>
+ <instance addr="0x220226CB" reg_inst="10"/>
+ <instance addr="0x220216CB" reg_inst="11"/>
+ <instance addr="0x230286CB" reg_inst="12"/>
+ <instance addr="0x230246CB" reg_inst="13"/>
+ <instance addr="0x230226CB" reg_inst="14"/>
+ <instance addr="0x230216CB" reg_inst="15"/>
+ <instance addr="0x240286CB" reg_inst="16"/>
+ <instance addr="0x240246CB" reg_inst="17"/>
+ <instance addr="0x240226CB" reg_inst="18"/>
+ <instance addr="0x240216CB" reg_inst="19"/>
+ <instance addr="0x250286CB" reg_inst="20"/>
+ <instance addr="0x250246CB" reg_inst="21"/>
+ <instance addr="0x250226CB" reg_inst="22"/>
+ <instance addr="0x250216CB" reg_inst="23"/>
+ <instance addr="0x260286CB" reg_inst="24"/>
+ <instance addr="0x260246CB" reg_inst="25"/>
+ <instance addr="0x260226CB" reg_inst="26"/>
+ <instance addr="0x260216CB" reg_inst="27"/>
+ <instance addr="0x270286CB" reg_inst="28"/>
+ <instance addr="0x270246CB" reg_inst="29"/>
+ <instance addr="0x270226CB" reg_inst="30"/>
+ <instance addr="0x270216CB" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG12">
+ <instance addr="0x200286CC" reg_inst="0"/>
+ <instance addr="0x200246CC" reg_inst="1"/>
+ <instance addr="0x200226CC" reg_inst="2"/>
+ <instance addr="0x200216CC" reg_inst="3"/>
+ <instance addr="0x210286CC" reg_inst="4"/>
+ <instance addr="0x210246CC" reg_inst="5"/>
+ <instance addr="0x210226CC" reg_inst="6"/>
+ <instance addr="0x210216CC" reg_inst="7"/>
+ <instance addr="0x220286CC" reg_inst="8"/>
+ <instance addr="0x220246CC" reg_inst="9"/>
+ <instance addr="0x220226CC" reg_inst="10"/>
+ <instance addr="0x220216CC" reg_inst="11"/>
+ <instance addr="0x230286CC" reg_inst="12"/>
+ <instance addr="0x230246CC" reg_inst="13"/>
+ <instance addr="0x230226CC" reg_inst="14"/>
+ <instance addr="0x230216CC" reg_inst="15"/>
+ <instance addr="0x240286CC" reg_inst="16"/>
+ <instance addr="0x240246CC" reg_inst="17"/>
+ <instance addr="0x240226CC" reg_inst="18"/>
+ <instance addr="0x240216CC" reg_inst="19"/>
+ <instance addr="0x250286CC" reg_inst="20"/>
+ <instance addr="0x250246CC" reg_inst="21"/>
+ <instance addr="0x250226CC" reg_inst="22"/>
+ <instance addr="0x250216CC" reg_inst="23"/>
+ <instance addr="0x260286CC" reg_inst="24"/>
+ <instance addr="0x260246CC" reg_inst="25"/>
+ <instance addr="0x260226CC" reg_inst="26"/>
+ <instance addr="0x260216CC" reg_inst="27"/>
+ <instance addr="0x270286CC" reg_inst="28"/>
+ <instance addr="0x270246CC" reg_inst="29"/>
+ <instance addr="0x270226CC" reg_inst="30"/>
+ <instance addr="0x270216CC" reg_inst="31"/>
+ </register>
+ <register name="LSU_HOLD_OUT_REG13">
+ <instance addr="0x200286CD" reg_inst="0"/>
+ <instance addr="0x200246CD" reg_inst="1"/>
+ <instance addr="0x200226CD" reg_inst="2"/>
+ <instance addr="0x200216CD" reg_inst="3"/>
+ <instance addr="0x210286CD" reg_inst="4"/>
+ <instance addr="0x210246CD" reg_inst="5"/>
+ <instance addr="0x210226CD" reg_inst="6"/>
+ <instance addr="0x210216CD" reg_inst="7"/>
+ <instance addr="0x220286CD" reg_inst="8"/>
+ <instance addr="0x220246CD" reg_inst="9"/>
+ <instance addr="0x220226CD" reg_inst="10"/>
+ <instance addr="0x220216CD" reg_inst="11"/>
+ <instance addr="0x230286CD" reg_inst="12"/>
+ <instance addr="0x230246CD" reg_inst="13"/>
+ <instance addr="0x230226CD" reg_inst="14"/>
+ <instance addr="0x230216CD" reg_inst="15"/>
+ <instance addr="0x240286CD" reg_inst="16"/>
+ <instance addr="0x240246CD" reg_inst="17"/>
+ <instance addr="0x240226CD" reg_inst="18"/>
+ <instance addr="0x240216CD" reg_inst="19"/>
+ <instance addr="0x250286CD" reg_inst="20"/>
+ <instance addr="0x250246CD" reg_inst="21"/>
+ <instance addr="0x250226CD" reg_inst="22"/>
+ <instance addr="0x250216CD" reg_inst="23"/>
+ <instance addr="0x260286CD" reg_inst="24"/>
+ <instance addr="0x260246CD" reg_inst="25"/>
+ <instance addr="0x260226CD" reg_inst="26"/>
+ <instance addr="0x260216CD" reg_inst="27"/>
+ <instance addr="0x270286CD" reg_inst="28"/>
+ <instance addr="0x270246CD" reg_inst="29"/>
+ <instance addr="0x270226CD" reg_inst="30"/>
+ <instance addr="0x270216CD" reg_inst="31"/>
+ </register>
+ <capture_group node_inst="0:31">
+ <capture_register reg_name="PC_FIR_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="THRCTL_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="VSU_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="TFAC_HOLD_OUT" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT0" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT1" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT2" reg_inst= "0:31" />
+ <capture_register reg_name="IFU_HOLD_OUT3" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT0" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT1" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT2" reg_inst= "0:31" />
+ <capture_register reg_name="ISU_HOLD_OUT3" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG0" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG1" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG2" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG3" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG4" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG5" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG6" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG7" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG8" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG9" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG10" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG11" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG12" reg_inst= "0:31" />
+ <capture_register reg_name="LSU_HOLD_OUT_REG13" reg_inst= "0:31" />
+ </capture_group>
<rule attn_type="CS" node_inst="0:31">
<!-- FIR & ~MASK & ~ACT0 & ~ACT1 -->
<expr type="and">
diff --git a/xml/p10/node_eq_l2_fir.xml b/xml/p10/node_eq_l2_fir.xml
index d0d20ea..1e82173 100644
--- a/xml/p10/node_eq_l2_fir.xml
+++ b/xml/p10/node_eq_l2_fir.xml
@@ -36,44 +36,116 @@
<action attn_type="CS" config="00"/>
<action attn_type="RE" config="01"/>
</local_fir>
- <bit pos="0">H/W Trigger Mechanism at point cache read occurs that detects a CE by ECCCK on RC/CO/SN read. Note: PRD counts the number of these and then will trigger LineDelete.</bit>
- <bit pos="1">H/W Trigger Mechanism at point cache read occurs that detects a UE(non SUE) by ECCCK on RC/CO/SN read.</bit>
- <bit pos="2">H/W Trigger Mechanism at point cache read occurs that detects a SUE by ECCCK on RC/CO/SN read.</bit>
- <bit pos="3">H/W intiated Line Delete occured (Id state injected into the dir) by RC or SN machine.</bit>
- <bit pos="4">L2 Castout where L2 cache read detected UE/SUE and Line is M,Mu,T,Tn</bit>
- <bit pos="5">L2 Castout where L2 cache read detected UE/SUE and Line is Me,Te,Ten,Sl,S</bit>
- <bit pos="6">L2 corrected a CE in the L2 directory</bit>
- <bit pos="7">L2 detected a UE in the L2 directory</bit>
- <bit pos="8">L2 detected a SBCE in the L2 directory</bit>
- <bit pos="9">PEC attempted to repair and CO a SBCE condition but failed(eg CO disp failed). Cache line was lost.</bit>
- <bit pos="10">DEPRICATED: THIS FIR BIT SHOULD ALWAYS BE MASKED. Multiple CE/UE deteceted between 2 hang 'early hang' pulse time window</bit>
- <bit pos="11">LRU array has illegal valu in it(due to flipped bit)</bit>
- <bit pos="12">RC timed out waiting for powerbus to return data.</bit>
- <bit pos="13">NCU timed out waiting for powerbus to return data.</bit>
+ <register name="L2_ERR_RPT0">
+ <instance addr="0x20028012" reg_inst="0"/>
+ <instance addr="0x20024012" reg_inst="1"/>
+ <instance addr="0x20022012" reg_inst="2"/>
+ <instance addr="0x20021012" reg_inst="3"/>
+ <instance addr="0x21028012" reg_inst="4"/>
+ <instance addr="0x21024012" reg_inst="5"/>
+ <instance addr="0x21022012" reg_inst="6"/>
+ <instance addr="0x21021012" reg_inst="7"/>
+ <instance addr="0x22028012" reg_inst="8"/>
+ <instance addr="0x22024012" reg_inst="9"/>
+ <instance addr="0x22022012" reg_inst="10"/>
+ <instance addr="0x22021012" reg_inst="11"/>
+ <instance addr="0x23028012" reg_inst="12"/>
+ <instance addr="0x23024012" reg_inst="13"/>
+ <instance addr="0x23022012" reg_inst="14"/>
+ <instance addr="0x23021012" reg_inst="15"/>
+ <instance addr="0x24028012" reg_inst="16"/>
+ <instance addr="0x24024012" reg_inst="17"/>
+ <instance addr="0x24022012" reg_inst="18"/>
+ <instance addr="0x24021012" reg_inst="19"/>
+ <instance addr="0x25028012" reg_inst="20"/>
+ <instance addr="0x25024012" reg_inst="21"/>
+ <instance addr="0x25022012" reg_inst="22"/>
+ <instance addr="0x25021012" reg_inst="23"/>
+ <instance addr="0x26028012" reg_inst="24"/>
+ <instance addr="0x26024012" reg_inst="25"/>
+ <instance addr="0x26022012" reg_inst="26"/>
+ <instance addr="0x26021012" reg_inst="27"/>
+ <instance addr="0x27028012" reg_inst="28"/>
+ <instance addr="0x27024012" reg_inst="29"/>
+ <instance addr="0x27022012" reg_inst="30"/>
+ <instance addr="0x27021012" reg_inst="31"/>
+ </register>
+ <register name="L2_ERR_RPT1">
+ <instance addr="0x20028013" reg_inst="0"/>
+ <instance addr="0x20024013" reg_inst="1"/>
+ <instance addr="0x20022013" reg_inst="2"/>
+ <instance addr="0x20021013" reg_inst="3"/>
+ <instance addr="0x21028013" reg_inst="4"/>
+ <instance addr="0x21024013" reg_inst="5"/>
+ <instance addr="0x21022013" reg_inst="6"/>
+ <instance addr="0x21021013" reg_inst="7"/>
+ <instance addr="0x22028013" reg_inst="8"/>
+ <instance addr="0x22024013" reg_inst="9"/>
+ <instance addr="0x22022013" reg_inst="10"/>
+ <instance addr="0x22021013" reg_inst="11"/>
+ <instance addr="0x23028013" reg_inst="12"/>
+ <instance addr="0x23024013" reg_inst="13"/>
+ <instance addr="0x23022013" reg_inst="14"/>
+ <instance addr="0x23021013" reg_inst="15"/>
+ <instance addr="0x24028013" reg_inst="16"/>
+ <instance addr="0x24024013" reg_inst="17"/>
+ <instance addr="0x24022013" reg_inst="18"/>
+ <instance addr="0x24021013" reg_inst="19"/>
+ <instance addr="0x25028013" reg_inst="20"/>
+ <instance addr="0x25024013" reg_inst="21"/>
+ <instance addr="0x25022013" reg_inst="22"/>
+ <instance addr="0x25021013" reg_inst="23"/>
+ <instance addr="0x26028013" reg_inst="24"/>
+ <instance addr="0x26024013" reg_inst="25"/>
+ <instance addr="0x26022013" reg_inst="26"/>
+ <instance addr="0x26021013" reg_inst="27"/>
+ <instance addr="0x27028013" reg_inst="28"/>
+ <instance addr="0x27024013" reg_inst="29"/>
+ <instance addr="0x27022013" reg_inst="30"/>
+ <instance addr="0x27021013" reg_inst="31"/>
+ </register>
+ <capture_group node_inst="0:31">
+ <capture_register reg_name="L2_ERR_RPT0" reg_inst= "0:31" />
+ <capture_register reg_name="L2_ERR_RPT1" reg_inst= "0:31" />
+ </capture_group>
+ <bit pos="0">L2 cache read CE</bit>
+ <bit pos="1">L2 cache read UE</bit>
+ <bit pos="2">L2 cache read SUE</bit>
+ <bit pos="3">Hw directory initiated line delete</bit>
+ <bit pos="4">UE or SUE detected by on modified line</bit>
+ <bit pos="5">UE or SUE detected on non-modified line</bit>
+ <bit pos="6">L2 directory read CE</bit>
+ <bit pos="7">L2 directory read UE</bit>
+ <bit pos="8">L2 directory CE due to stuck bit</bit>
+ <bit pos="9">L2 directory stuck bit CE repair failed</bit>
+ <bit pos="10">reserved</bit>
+ <bit pos="11">LRU read error detected</bit>
+ <bit pos="12">RC timed out waiting for powerbus to return data</bit>
+ <bit pos="13">NCU timed out waiting for powerbus to return data</bit>
<bit pos="14">Internal h/w control error</bit>
- <bit pos="15">All members in a single congruence class has been deleted</bit>
- <bit pos="16">Cache Inhibited Ld/St hit a line in the L2 cache. SW error</bit>
- <bit pos="17">RC was doing a fabric op on behalf of a load and got an cresp=addr_err</bit>
- <bit pos="18">RC was doing a fabric op on behalf of a store and got an cresp=addr_err</bit>
- <bit pos="19">RC incoming Power Bus data had a CE error.</bit>
- <bit pos="20">RC incoming Power Bus data had a UE error.</bit>
- <bit pos="21">RC incoming Power Bus data had a SUE error.</bit>
- <bit pos="22">Targetted nodal request got rty_inc cresp.</bit>
- <bit pos="23">RC was doing a fabric op on behalf of a load and got an cresp=addr_err for hyp memory</bit>
- <bit pos="24">RCDAT read parity error.</bit>
- <bit pos="25">CO or SNP was doing a fabric op on behalf of a store and got an cresp=addr_err</bit>
- <bit pos="26">LVDIR took a parity error.</bit>
- <bit pos="27">bad topology table config software error</bit>
- <bit pos="28">Darn timed out waiting for data.</bit>
- <bit pos="29">Early hang in L2.</bit>
- <bit pos="30">Unexpected cast-out or push during chip_contained mode, maybe also during host-boot before memory available. Mask after host-boot memory ipl.</bit>
- <bit pos="31">L2 FIR Register</bit>
- <bit pos="32">PEC Phase3 timeout, recoverable problem, information only.</bit>
- <bit pos="33">L2 FIR Register</bit>
- <bit pos="34">L2 FIR Register</bit>
- <bit pos="35">L2 FIR Register</bit>
- <bit pos="36">Cache read CE and UE popped within a short hang pulse. Could be a triple bit error.</bit>
- <bit pos="37">L2 FIR Register</bit>
- <bit pos="38">L2 FIR Register</bit>
- <bit pos="39">L2 FIR Register</bit>
+ <bit pos="15">LRU all members in a class line deleted</bit>
+ <bit pos="16">Cache Inhibited Ld/St hit a line in the L2 cache</bit>
+ <bit pos="17">(RC) load received pb cresp addr error</bit>
+ <bit pos="18">(RC) store received pb cresp addr error</bit>
+ <bit pos="19">RC incoming Power Bus data had a CE error</bit>
+ <bit pos="20">RC incoming Power Bus data had a UE error</bit>
+ <bit pos="21">RC incoming Power Bus data had a SUE error</bit>
+ <bit pos="22">Targetted nodal request got rty_inc cresp</bit>
+ <bit pos="23">RC fabric op Ld cresp addr error for hyp</bit>
+ <bit pos="24">RCDAT read parity error</bit>
+ <bit pos="25">L2 castout or CN cresp addr err</bit>
+ <bit pos="26">LVDIR took a parity error</bit>
+ <bit pos="27">Bad topology table config software error</bit>
+ <bit pos="28">Darn timed out waiting for data</bit>
+ <bit pos="29">Early hang in L2</bit>
+ <bit pos="30">Unexpected cast-out or push during chip_contained</bit>
+ <bit pos="31">reserved</bit>
+ <bit pos="32">Time out during PEC sequence trying to correct l2dir error</bit>
+ <bit pos="33">reserved</bit>
+ <bit pos="34">reserved</bit>
+ <bit pos="35">reserved</bit>
+ <bit pos="36">Cache CE and UE in short time period</bit>
+ <bit pos="37">reserved</bit>
+ <bit pos="38">reserved</bit>
+ <bit pos="39">reserved</bit>
</attn_node>
diff --git a/xml/p10/node_eq_l3_fir.xml b/xml/p10/node_eq_l3_fir.xml
index 42dd33b..3faf1ef 100644
--- a/xml/p10/node_eq_l3_fir.xml
+++ b/xml/p10/node_eq_l3_fir.xml
@@ -36,37 +36,109 @@
<action attn_type="CS" config="00"/>
<action attn_type="RE" config="01"/>
</local_fir>
- <bit pos="0">When this error occurs, no members are available for a particular CGC. This will cause an infinite hang of a CI machine. There may be no members available due to a combination of line delete, way disable, and segr lco/qbit mode.</bit>
- <bit pos="1">L3 attempted to master a CP (Castout/Push) command to the fabric when in chip_contained mode</bit>
- <bit pos="2">Access attempted to use invalid topology table entry. Access may be from CO, RD, PF or snoop</bit>
- <bit pos="3">This error indicates at least 1 CE and 1 UE have occurred within 1 fabric data hang pulse interval. This is an indication that a wordline fail may be occurring.</bit>
- <bit pos="4">CE detected along read dataflow. This may assert due to cache read, casthru, pf_byp. If we are configured to do a single line delete and detect a CE for a cache read from a snoop/read machine, then fir26 will assert instead (fir4 will not assert). If set to do continuous line deletes fir4 will assert on CE (fir26 will not assert).</bit>
- <bit pos="5">UE detected along read dataflow. May assert due to cache read, casthru, pf_byp.</bit>
- <bit pos="6">SUE detected along read dataflow. May assert due to cache read, casthru, pf_byp.</bit>
- <bit pos="7">CE detected along write dataflow with data from PowerBus (Prefetch, LCO or Cache Inject)</bit>
- <bit pos="8">UE detected along write dataflow with data from PowerBus (Prefetch, LCO or Cache Inject)</bit>
- <bit pos="9">SUE detected along write dataflow with data from PowerBus (Prefetch, LCO or Cache Inject)</bit>
- <bit pos="10">CE detected along write dataflow with data from L2 CPI buffer or WIHPC</bit>
- <bit pos="11">UE detected along write dataflow with data from L2 CPI buffer or WIHPC</bit>
- <bit pos="12">SUE detected along write dataflow with data from L2 CPI buffer or WIHPC</bit>
- <bit pos="13">Directory CE Occured</bit>
- <bit pos="14">Directory UE Occured</bit>
- <bit pos="15">Directory error occured but no error found during re-read of the directory again</bit>
+ <register name="L3_ERR_RPT0">
+ <instance addr="0x20018610" reg_inst="0"/>
+ <instance addr="0x20014610" reg_inst="1"/>
+ <instance addr="0x20012610" reg_inst="2"/>
+ <instance addr="0x20011610" reg_inst="3"/>
+ <instance addr="0x21018610" reg_inst="4"/>
+ <instance addr="0x21014610" reg_inst="5"/>
+ <instance addr="0x21012610" reg_inst="6"/>
+ <instance addr="0x21011610" reg_inst="7"/>
+ <instance addr="0x22018610" reg_inst="8"/>
+ <instance addr="0x22014610" reg_inst="9"/>
+ <instance addr="0x22012610" reg_inst="10"/>
+ <instance addr="0x22011610" reg_inst="11"/>
+ <instance addr="0x23018610" reg_inst="12"/>
+ <instance addr="0x23014610" reg_inst="13"/>
+ <instance addr="0x23012610" reg_inst="14"/>
+ <instance addr="0x23011610" reg_inst="15"/>
+ <instance addr="0x24018610" reg_inst="16"/>
+ <instance addr="0x24014610" reg_inst="17"/>
+ <instance addr="0x24012610" reg_inst="18"/>
+ <instance addr="0x24011610" reg_inst="19"/>
+ <instance addr="0x25018610" reg_inst="20"/>
+ <instance addr="0x25014610" reg_inst="21"/>
+ <instance addr="0x25012610" reg_inst="22"/>
+ <instance addr="0x25011610" reg_inst="23"/>
+ <instance addr="0x26018610" reg_inst="24"/>
+ <instance addr="0x26014610" reg_inst="25"/>
+ <instance addr="0x26012610" reg_inst="26"/>
+ <instance addr="0x26011610" reg_inst="27"/>
+ <instance addr="0x27018610" reg_inst="28"/>
+ <instance addr="0x27014610" reg_inst="29"/>
+ <instance addr="0x27012610" reg_inst="30"/>
+ <instance addr="0x27011610" reg_inst="31"/>
+ </register>
+ <register name="L3_ERR_RPT1">
+ <instance addr="0x20018617" reg_inst="0"/>
+ <instance addr="0x20014617" reg_inst="1"/>
+ <instance addr="0x20012617" reg_inst="2"/>
+ <instance addr="0x20011617" reg_inst="3"/>
+ <instance addr="0x21018617" reg_inst="4"/>
+ <instance addr="0x21014617" reg_inst="5"/>
+ <instance addr="0x21012617" reg_inst="6"/>
+ <instance addr="0x21011617" reg_inst="7"/>
+ <instance addr="0x22018617" reg_inst="8"/>
+ <instance addr="0x22014617" reg_inst="9"/>
+ <instance addr="0x22012617" reg_inst="10"/>
+ <instance addr="0x22011617" reg_inst="11"/>
+ <instance addr="0x23018617" reg_inst="12"/>
+ <instance addr="0x23014617" reg_inst="13"/>
+ <instance addr="0x23012617" reg_inst="14"/>
+ <instance addr="0x23011617" reg_inst="15"/>
+ <instance addr="0x24018617" reg_inst="16"/>
+ <instance addr="0x24014617" reg_inst="17"/>
+ <instance addr="0x24012617" reg_inst="18"/>
+ <instance addr="0x24011617" reg_inst="19"/>
+ <instance addr="0x25018617" reg_inst="20"/>
+ <instance addr="0x25014617" reg_inst="21"/>
+ <instance addr="0x25012617" reg_inst="22"/>
+ <instance addr="0x25011617" reg_inst="23"/>
+ <instance addr="0x26018617" reg_inst="24"/>
+ <instance addr="0x26014617" reg_inst="25"/>
+ <instance addr="0x26012617" reg_inst="26"/>
+ <instance addr="0x26011617" reg_inst="27"/>
+ <instance addr="0x27018617" reg_inst="28"/>
+ <instance addr="0x27014617" reg_inst="29"/>
+ <instance addr="0x27012617" reg_inst="30"/>
+ <instance addr="0x27011617" reg_inst="31"/>
+ </register>
+ <capture_group node_inst="0:31">
+ <capture_register reg_name="L3_ERR_RPT0" reg_inst= "0:31" />
+ <capture_register reg_name="L3_ERR_RPT1" reg_inst= "0:31" />
+ </capture_group>
+ <bit pos="0">No members available for a CGC</bit>
+ <bit pos="1">L3 attempted to master a CP (Castout/Push) command</bit>
+ <bit pos="2">Access attempted to use invalid topology table entry</bit>
+ <bit pos="3">L3 cache CE and UE within a short period</bit>
+ <bit pos="4">CE detected on L3 cache read</bit>
+ <bit pos="5">UE detected on L3 cache read</bit>
+ <bit pos="6">SUE detected on L3 cache read</bit>
+ <bit pos="7">L3 cache write data CE from Power Bus</bit>
+ <bit pos="8">L3 cache write data UE from Power Bus</bit>
+ <bit pos="9">L3 cache write data sue from Power Bus</bit>
+ <bit pos="10">L3 cache write data CE from L2</bit>
+ <bit pos="11">L3 cache write data UE from L2</bit>
+ <bit pos="12">L3 cache write SUE from L2</bit>
+ <bit pos="13">L3 DIR read CE</bit>
+ <bit pos="14">L3 Dir read UE</bit>
+ <bit pos="15">Dir error not found during corr seq</bit>
<bit pos="16">Received addr_error cresp on Snoop Machine or Castout Operation</bit>
<bit pos="17">Received addr_error cresp for Prefetch Operation</bit>
- <bit pos="18">Asserts when the L3 returns presp_rty_other to a PowerBus hang.poll or hang.check RCMD. This is typically masked, but provides an indication that an operation hang has been detected and signalled.</bit>
- <bit pos="19">lru invalid count error. Violation of requirement that, when not in dmap or fixed-member mode, each group must have a member with lru_cnt=0 for 1st class and a member with lru_cnt=0 for 2nd class if there is a 2nd class member. Will not assert when an lru_cnt=0 is found for a member that is disabled. This error is typically masked because l3_lru_vic_sel_error is the true check for LRU errors. This is only a partial check (it doesn't check for multiple lru_cnt=0) and it can assert even when the LRU array contents are not used (error is in a class that isn't used) This error (missing lru_cnt=0) is recoverable - the L3 fails dispatch and then goes into random-victim- selection mode until it succeeds. This bit may assert despite no error if the group and config have changed since the last time the CGC was accessed.</bit>
- <bit pos="20">spare20</bit>
- <bit pos="21">spare21</bit>
- <bit pos="22">spare22</bit>
- <bit pos="23">Prefetcj or Write Inject machine PowerBus data hang check</bit>
- <bit pos="24">Hardware Control Error. See Hardware Control Error Read0/1 SCOM Registers for details.</bit>
- <bit pos="25">Cache Inhibited operation was hit in the L3 directory. This is usually a software bug.</bit>
- <bit pos="26">Snoop Machine or Read machine has performed a line delete from a cache read</bit>
- <bit pos="27">Indicates that this l3 has snooped an incoming lco and in which the source (rcmdx_source) is not proxime. This is likely due to a programming error and could result in multiple owners of a line</bit>
- <bit pos="28">Indicates the L3 is inserting a line and thus a victimization might be needed (if there are no invalid line in the CGC), but the L3 failed to select exactly one member for (possible) victimization. This asserts due to a LRU array bit error (lru_inval_cnt_err may also asserts). This may assert despite no error if the group and config have changed since the last time the CGC was accessed. This error is recoverable - the L3 fails dispatch and then goes into random-victim- selection mode until it succeeds, at which time (sometimes prior to this) the error is overwritten. On an L2-read or snoop, an LRU array is read, but errors aren't checked or corrected because there is no LRU array write.</bit>
- <bit pos="29">All members are either column or line deleted in some CGC class</bit>
- <bit pos="30">Indicates that this l3 has snooped an incoming lco and we are the target however, our lco target id (set via SCOM in mode_reg1) does not match the chiplet id set by pb through input pins pb_ex_chiplet_id_dc Note that in chip-contained mode, the LCOs ID are often set to values that dont match the pb_ex_chiplet_id, thus this error is masked in that mode.</bit>
- <bit pos="31">Received ack_dead or ed_ack_dead cresp on CO, SN operation (pb write)</bit>
- <bit pos="32">Received ack_dead or ed_ack_dead cresp on PF operation (pb read)</bit>
+ <bit pos="18">L3_PB_HANG_POLL</bit>
+ <bit pos="19">Invalid LRU count error</bit>
+ <bit pos="20">Reserved</bit>
+ <bit pos="21">Reserved</bit>
+ <bit pos="22">Reserved</bit>
+ <bit pos="23">Prefetch or Write Inject machine PowerBus data hang check</bit>
+ <bit pos="24">L3 Hw control err</bit>
+ <bit pos="25">Cache inhibited op in L3 directory</bit>
+ <bit pos="26">L3 line delete CE done</bit>
+ <bit pos="27">L3 snooped an incoming LCO</bit>
+ <bit pos="28">LRU intended to victimize a line, but invalid line selected</bit>
+ <bit pos="29">L3 cache congruence class deleted</bit>
+ <bit pos="30">Incoming LCO ID mismatch</bit>
+ <bit pos="31">L3 PowerBus Master Write CRESP ack_dead</bit>
+ <bit pos="32">PB Master Read received ack_dead CRESP</bit>
</attn_node>
diff --git a/xml/p10/node_eq_ncu_fir.xml b/xml/p10/node_eq_ncu_fir.xml
index 98756b3..20b7850 100644
--- a/xml/p10/node_eq_ncu_fir.xml
+++ b/xml/p10/node_eq_ncu_fir.xml
@@ -36,33 +36,70 @@
<action attn_type="CS" config="00"/>
<action attn_type="RE" config="01"/>
</local_fir>
- <bit pos="0">H/W control error.</bit>
- <bit pos="1">TLBIE control error.</bit>
- <bit pos="2">TLBIE or SLBIEG received illegal fields from core.</bit>
- <bit pos="3">Store address machine received addr_err cresp.</bit>
- <bit pos="4">Load address machine received addr_err cresp.</bit>
+ <register name="NCU_ERR_RPT_REG">
+ <instance addr="0x2001864E" reg_inst="0"/>
+ <instance addr="0x2001464E" reg_inst="1"/>
+ <instance addr="0x2001264E" reg_inst="2"/>
+ <instance addr="0x2001164E" reg_inst="3"/>
+ <instance addr="0x2101864E" reg_inst="4"/>
+ <instance addr="0x2101464E" reg_inst="5"/>
+ <instance addr="0x2101264E" reg_inst="6"/>
+ <instance addr="0x2101164E" reg_inst="7"/>
+ <instance addr="0x2201864E" reg_inst="8"/>
+ <instance addr="0x2201464E" reg_inst="9"/>
+ <instance addr="0x2201264E" reg_inst="10"/>
+ <instance addr="0x2201164E" reg_inst="11"/>
+ <instance addr="0x2301864E" reg_inst="12"/>
+ <instance addr="0x2301464E" reg_inst="13"/>
+ <instance addr="0x2301264E" reg_inst="14"/>
+ <instance addr="0x2301164E" reg_inst="15"/>
+ <instance addr="0x2401864E" reg_inst="16"/>
+ <instance addr="0x2401464E" reg_inst="17"/>
+ <instance addr="0x2401264E" reg_inst="18"/>
+ <instance addr="0x2401164E" reg_inst="19"/>
+ <instance addr="0x2501864E" reg_inst="20"/>
+ <instance addr="0x2501464E" reg_inst="21"/>
+ <instance addr="0x2501264E" reg_inst="22"/>
+ <instance addr="0x2501164E" reg_inst="23"/>
+ <instance addr="0x2601864E" reg_inst="24"/>
+ <instance addr="0x2601464E" reg_inst="25"/>
+ <instance addr="0x2601264E" reg_inst="26"/>
+ <instance addr="0x2601164E" reg_inst="27"/>
+ <instance addr="0x2701864E" reg_inst="28"/>
+ <instance addr="0x2701464E" reg_inst="29"/>
+ <instance addr="0x2701264E" reg_inst="30"/>
+ <instance addr="0x2701164E" reg_inst="31"/>
+ </register>
+ <capture_group node_inst="0:31">
+ <capture_register reg_name="NCU_ERR_RPT_REG" reg_inst= "0:31" />
+ </capture_group>
+ <bit pos="0">NCU store queue control error</bit>
+ <bit pos="1">TLBIE control error</bit>
+ <bit pos="2">TLBIE or SLBIEG received illegal fields from core</bit>
+ <bit pos="3">Store address machine received addr_err cresp</bit>
+ <bit pos="4">Load address machine received addr_err cresp</bit>
<bit pos="5">Topology table error - tried accessing invalid entry</bit>
- <bit pos="6">One the NCU machines triggerd PB into early hang recovery</bit>
+ <bit pos="6">An NCU machine triggerd PB into early hang recovery</bit>
<bit pos="7">MSGSND received addr_err</bit>
- <bit pos="8">Store data parity error from regfile detected.</bit>
- <bit pos="9">Store timed out on PB.</bit>
- <bit pos="10">TLBIE master timed out on PB.</bit>
- <bit pos="11">TLBIE snooper timed out waiting for core.</bit>
- <bit pos="12">IMA received addr_err cresp.</bit>
- <bit pos="13">TLBIE/sync machine received addr_err cresp.</bit>
- <bit pos="14">PMISC received address error cresp.</bit>
- <bit pos="15">cHTM logic recieve an HTM/IMA packet that it wasn't setup for</bit>
- <bit pos="16">Spare fir bits.</bit>
- <bit pos="17">Spare fir bits.</bit>
- <bit pos="18">Spare fir bits.</bit>
- <bit pos="19">PPE write received ack_dead</bit>
- <bit pos="20">Darn ttype while darn not enabled.</bit>
- <bit pos="21">Darn Address Error cresp.</bit>
- <bit pos="22">Spare fir bits.</bit>
- <bit pos="23">Spare fir bits.</bit>
- <bit pos="24">Spare fir bits.</bit>
- <bit pos="25">Spare fir bits.</bit>
- <bit pos="26">Spare fir bits.</bit>
- <bit pos="27">Spare fir bits.</bit>
- <bit pos="28">Spare fir bits.</bit>
+ <bit pos="8">Store data parity error from regfile detected</bit>
+ <bit pos="9">Store timed out on PB</bit>
+ <bit pos="10">TLBIE master timed out on PB</bit>
+ <bit pos="11">TLBIE snooper timed out waiting for core</bit>
+ <bit pos="12">IMA received addr_err cresp</bit>
+ <bit pos="13">TLBIE/sync machine received addr_err cresp</bit>
+ <bit pos="14">PMISC received address error cresp</bit>
+ <bit pos="15">cHTM logic recieve an HTM/IMA packet</bit>
+ <bit pos="16">spare</bit>
+ <bit pos="17">spare</bit>
+ <bit pos="18">spare</bit>
+ <bit pos="19">Targeted nodal request got rty_inc cresp</bit>
+ <bit pos="20">Darn ttype while darn not enabled</bit>
+ <bit pos="21">Darn Address Error cresp</bit>
+ <bit pos="22">spare</bit>
+ <bit pos="23">spare</bit>
+ <bit pos="24">spare</bit>
+ <bit pos="25">spare</bit>
+ <bit pos="26">spare</bit>
+ <bit pos="27">spare</bit>
+ <bit pos="28">spare</bit>
</attn_node>
diff --git a/xml/p10/node_eq_ncu_fir_p10_10.xml b/xml/p10/node_eq_ncu_fir_p10_10.xml
index 93336fd..3d6fe44 100644
--- a/xml/p10/node_eq_ncu_fir_p10_10.xml
+++ b/xml/p10/node_eq_ncu_fir_p10_10.xml
@@ -36,33 +36,70 @@
<action attn_type="CS" config="00"/>
<action attn_type="RE" config="01"/>
</local_fir>
- <bit pos="0">H/W control error.</bit>
- <bit pos="1">TLBIE control error.</bit>
- <bit pos="2">TLBIE or SLBIEG received illegal fields from core.</bit>
- <bit pos="3">Store address machine received addr_err cresp.</bit>
- <bit pos="4">Load address machine received addr_err cresp.</bit>
+ <register name="NCU_ERR_RPT_REG">
+ <instance addr="0x2001864E" reg_inst="0"/>
+ <instance addr="0x2001464E" reg_inst="1"/>
+ <instance addr="0x2001264E" reg_inst="2"/>
+ <instance addr="0x2001164E" reg_inst="3"/>
+ <instance addr="0x2101864E" reg_inst="4"/>
+ <instance addr="0x2101464E" reg_inst="5"/>
+ <instance addr="0x2101264E" reg_inst="6"/>
+ <instance addr="0x2101164E" reg_inst="7"/>
+ <instance addr="0x2201864E" reg_inst="8"/>
+ <instance addr="0x2201464E" reg_inst="9"/>
+ <instance addr="0x2201264E" reg_inst="10"/>
+ <instance addr="0x2201164E" reg_inst="11"/>
+ <instance addr="0x2301864E" reg_inst="12"/>
+ <instance addr="0x2301464E" reg_inst="13"/>
+ <instance addr="0x2301264E" reg_inst="14"/>
+ <instance addr="0x2301164E" reg_inst="15"/>
+ <instance addr="0x2401864E" reg_inst="16"/>
+ <instance addr="0x2401464E" reg_inst="17"/>
+ <instance addr="0x2401264E" reg_inst="18"/>
+ <instance addr="0x2401164E" reg_inst="19"/>
+ <instance addr="0x2501864E" reg_inst="20"/>
+ <instance addr="0x2501464E" reg_inst="21"/>
+ <instance addr="0x2501264E" reg_inst="22"/>
+ <instance addr="0x2501164E" reg_inst="23"/>
+ <instance addr="0x2601864E" reg_inst="24"/>
+ <instance addr="0x2601464E" reg_inst="25"/>
+ <instance addr="0x2601264E" reg_inst="26"/>
+ <instance addr="0x2601164E" reg_inst="27"/>
+ <instance addr="0x2701864E" reg_inst="28"/>
+ <instance addr="0x2701464E" reg_inst="29"/>
+ <instance addr="0x2701264E" reg_inst="30"/>
+ <instance addr="0x2701164E" reg_inst="31"/>
+ </register>
+ <capture_group node_inst="0:31">
+ <capture_register reg_name="NCU_ERR_RPT_REG" reg_inst= "0:31" />
+ </capture_group>
+ <bit pos="0">NCU store queue control error</bit>
+ <bit pos="1">TLBIE control error</bit>
+ <bit pos="2">TLBIE or SLBIEG received illegal fields from core</bit>
+ <bit pos="3">Store address machine received addr_err cresp</bit>
+ <bit pos="4">Load address machine received addr_err cresp</bit>
<bit pos="5">Topology table error - tried accessing invalid entry</bit>
- <bit pos="6">One the NCU machines triggerd PB into early hang recovery</bit>
+ <bit pos="6">An NCU machine triggerd PB into early hang recovery</bit>
<bit pos="7">MSGSND received addr_err</bit>
- <bit pos="8">Store data parity error from regfile detected.</bit>
- <bit pos="9">Store timed out on PB.</bit>
- <bit pos="10">TLBIE master timed out on PB.</bit>
- <bit pos="11">TLBIE snooper timed out waiting for core.</bit>
- <bit pos="12">IMA received addr_err cresp.</bit>
- <bit pos="13">TLBIE/sync machine received addr_err cresp.</bit>
- <bit pos="14">PMISC received address error cresp.</bit>
- <bit pos="15">Spare fir bits.</bit>
- <bit pos="16">Spare fir bits.</bit>
- <bit pos="17">Spare fir bits.</bit>
- <bit pos="18">Spare fir bits.</bit>
- <bit pos="19">PPE write received ack_dead</bit>
- <bit pos="20">Darn ttype while darn not enabled.</bit>
- <bit pos="21">Darn Address Error cresp.</bit>
- <bit pos="22">Spare fir bits.</bit>
- <bit pos="23">Spare fir bits.</bit>
- <bit pos="24">Spare fir bits.</bit>
- <bit pos="25">Spare fir bits.</bit>
- <bit pos="26">Spare fir bits.</bit>
- <bit pos="27">Spare fir bits.</bit>
- <bit pos="28">Spare fir bits.</bit>
+ <bit pos="8">Store data parity error from regfile detected</bit>
+ <bit pos="9">Store timed out on PB</bit>
+ <bit pos="10">TLBIE master timed out on PB</bit>
+ <bit pos="11">TLBIE snooper timed out waiting for core</bit>
+ <bit pos="12">IMA received addr_err cresp</bit>
+ <bit pos="13">TLBIE/sync machine received addr_err cresp</bit>
+ <bit pos="14">PMISC received address error cresp</bit>
+ <bit pos="15">spare</bit>
+ <bit pos="16">spare</bit>
+ <bit pos="17">spare</bit>
+ <bit pos="18">spare</bit>
+ <bit pos="19">Targeted nodal request got rty_inc cresp</bit>
+ <bit pos="20">Darn ttype while darn not enabled</bit>
+ <bit pos="21">Darn Address Error cresp</bit>
+ <bit pos="22">spare</bit>
+ <bit pos="23">spare</bit>
+ <bit pos="24">spare</bit>
+ <bit pos="25">spare</bit>
+ <bit pos="26">spare</bit>
+ <bit pos="27">spare</bit>
+ <bit pos="28">spare</bit>
</attn_node>