| <?xml version="1.0" encoding="UTF-8"?> |
| <attn_node model_ec="P10_10,P10_20" name="MC_OMI_DL_FIR" reg_type="SCOM"> |
| <local_fir config="W" name="MC_OMI_DL_FIR"> |
| <instance addr="0x0C011400" reg_inst="0"/> |
| <instance addr="0x0C011800" reg_inst="1"/> |
| <instance addr="0x0D011400" reg_inst="2"/> |
| <instance addr="0x0D011800" reg_inst="3"/> |
| <instance addr="0x0E011400" reg_inst="4"/> |
| <instance addr="0x0E011800" reg_inst="5"/> |
| <instance addr="0x0F011400" reg_inst="6"/> |
| <instance addr="0x0F011800" reg_inst="7"/> |
| <action attn_type="CS" config="00"/> |
| <action attn_type="RE" config="01"/> |
| <action attn_type="SPA" config="10"/> |
| </local_fir> |
| |
| <register name="CMN_CONFIG"> |
| <instance reg_inst="0" addr="0x0C01140E" /> |
| <instance reg_inst="1" addr="0x0C01180E" /> |
| <instance reg_inst="2" addr="0x0D01140E" /> |
| <instance reg_inst="3" addr="0x0D01180E" /> |
| <instance reg_inst="4" addr="0x0E01140E" /> |
| <instance reg_inst="5" addr="0x0E01180E" /> |
| <instance reg_inst="6" addr="0x0F01140E" /> |
| <instance reg_inst="7" addr="0x0F01180E" /> |
| </register> |
| |
| <register name="PMU_CNTR"> |
| <instance reg_inst="0" addr="0x0C01140F" /> |
| <instance reg_inst="1" addr="0x0C01180F" /> |
| <instance reg_inst="2" addr="0x0D01140F" /> |
| <instance reg_inst="3" addr="0x0D01180F" /> |
| <instance reg_inst="4" addr="0x0E01140F" /> |
| <instance reg_inst="5" addr="0x0E01180F" /> |
| <instance reg_inst="6" addr="0x0F01140F" /> |
| <instance reg_inst="7" addr="0x0F01180F" /> |
| </register> |
| |
| <capture_group node_inst="0:7"> |
| <capture_register reg_name="CMN_CONFIG" reg_inst="0:7" /> |
| <capture_register reg_name="PMU_CNTR" reg_inst="0:7" /> |
| </capture_group> |
| |
| <bit pos="0:19" child_node="MC_OMI_DL" node_inst="0,2,4,6,8,10,12,14">OMI-DL0</bit> |
| <bit pos="20:39" child_node="MC_OMI_DL" node_inst="1,3,5,7,9,11,13,15">OMI-DL1</bit> |
| <bit pos="40:59">OMI-DL2</bit> |
| <bit pos="60">Performance monitor wrapped</bit> |
| <bit pos="61">OMI-DL common FIR Register</bit> |
| </attn_node> |