| <?xml version="1.0" encoding="UTF-8"?> |
| <attn_node model_ec="P10_10" name="PSIHB_FIR" reg_type="SCOM"> |
| <local_fir config="" name="PSIHB_FIR"> |
| <instance addr="0x03011D00" reg_inst="0"/> |
| <action attn_type="CS" config="00"/> |
| <action attn_type="RE" config="01"/> |
| </local_fir> |
| <bit pos="0">CE from PowerBus data</bit> |
| <bit pos="1">UE from PowerBus data</bit> |
| <bit pos="2">SUE from PowerBus data</bit> |
| <bit pos="3">Interrupt Condition present in PSIHB</bit> |
| <bit pos="4">Interrupt from FSP is being processed</bit> |
| <bit pos="5">CE from PSILL data</bit> |
| <bit pos="6">UE from PSILL data</bit> |
| <bit pos="7">Error bit set, ignores the interrupt mask</bit> |
| <bit pos="8">Invalid TType Hit on PHB or FSP bar</bit> |
| <bit pos="9">Invalid CResp returned to command issued by PSIHB</bit> |
| <bit pos="10">PowerBus time out waiting for data grant</bit> |
| <bit pos="11">PB parity error</bit> |
| <bit pos="12">FSP tried access to trusted space</bit> |
| <bit pos="13">Unexpected PB CRESP or DATA</bit> |
| <bit pos="14">Interrupt register change while interrupt still pending</bit> |
| <bit pos="15">PSI Interrupt address Error</bit> |
| <bit pos="16">OCC Interrupt address Error</bit> |
| <bit pos="17">FSI Interrupt address Error</bit> |
| <bit pos="18">LPC Interrupt address Error</bit> |
| <bit pos="19">LOCAL ERROR Interrupt address Error</bit> |
| <bit pos="20">HOST ERROR Interrupt address Error</bit> |
| <bit pos="21">PSI global error bit 0</bit> |
| <bit pos="22">PSI global error bit 1</bit> |
| <bit pos="23">Upstream error</bit> |
| <bit pos="24">spare</bit> |
| <bit pos="25">spare</bit> |
| <bit pos="26">spare</bit> |
| <bit pos="27">fir parity Error</bit> |
| </attn_node> |