commit 941193382242f27409a28d68adae9b7e0bd7b598
author Zane Shelley <zshelle@us.ibm.com> Wed Sep 22 15:00:43 2021 -0500
committer Zane Shelley <zshelle@us.ibm.com> Wed Sep 22 15:01:25 2021 -0500
tree 06b59595ca1b7f3a04f4d8f1e47170ae90584dc9
parent 2a3b925b8c190c5977f1341aecceb50279b82572

Fix signature descriptions for chiplet FIRs

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ia997666829269597ee87aa0685499badc86b83ba

xml/p10/node_cfir_pci_cs_re.xml

diff --git a/xml/p10/node_cfir_pci_cs_re.xml b/xml/p10/node_cfir_pci_cs_re.xml
index 0c78fd3..0cd9339 100644
--- a/xml/p10/node_cfir_pci_cs_re.xml
+++ b/xml/p10/node_cfir_pci_cs_re.xml
@@ -34,13 +34,13 @@
             <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
         </expr>
     </rule>
-    <bit child_node="PCI_LOCAL_FIR" node_inst="0,1" pos="4">Local FIR</bit>
-    <bit child_node="PCI_ETU_FIR" node_inst="0,3" pos="5">ETU FIR Register</bit>
-    <bit child_node="PCI_ETU_FIR" node_inst="1,4" pos="6">ETU FIR Register</bit>
-    <bit child_node="PCI_ETU_FIR" node_inst="2,5" pos="7">ETU FIR Register</bit>
-    <bit child_node="PCI_FIR" node_inst="0,3" pos="9">PCI FIR Register</bit>
-    <bit child_node="PCI_FIR" node_inst="1,4" pos="10">PCI FIR Register</bit>
-    <bit child_node="PCI_FIR" node_inst="2,5" pos="11">PCI FIR Register</bit>
-    <bit child_node="PCI_IOP_FIR" node_inst="0,2" pos="12">IOP Local Fault Isolation Register.  Register bits are set for any error condition detected by the IOP.  The IOPFIR will freeze upon logging the first error not masked in IOPMASK.</bit>
-    <bit child_node="PCI_IOP_FIR" node_inst="1,3" pos="13">IOP Local Fault Isolation Register.  Register bits are set for any error condition detected by the IOP.  The IOPFIR will freeze upon logging the first error not masked in IOPMASK.</bit>
+    <bit child_node="PCI_LOCAL_FIR" node_inst="0,1" pos="4">Attention from PCI_LOCAL_FIR</bit>
+    <bit child_node="PCI_ETU_FIR" node_inst="0,3" pos="5">Attention from PCI_ETU_FIR 0</bit>
+    <bit child_node="PCI_ETU_FIR" node_inst="1,4" pos="6">Attention from PCI_ETU_FIR 1</bit>
+    <bit child_node="PCI_ETU_FIR" node_inst="2,5" pos="7">Attention from PCI_ETU_FIR 2</bit>
+    <bit child_node="PCI_FIR" node_inst="0,3" pos="9">Attention from PCI_FIR 0</bit>
+    <bit child_node="PCI_FIR" node_inst="1,4" pos="10">Attention from PCI_FIR 1</bit>
+    <bit child_node="PCI_FIR" node_inst="2,5" pos="11">Attention from PCI_FIR 2</bit>
+    <bit child_node="PCI_IOP_FIR" node_inst="0,2" pos="12">Attention from PCI_IOP_FIR 0</bit>
+    <bit child_node="PCI_IOP_FIR" node_inst="1,3" pos="13">Attention from PCI_IOP_FIR 1</bit>
 </attn_node>