| <?xml version="1.0" encoding="UTF-8"?> |
| <attn_node model_ec="P10_20" name="EQ_QME_FIR" reg_type="SCOM"> |
| <register name="EQ_QME_FIR"> |
| <instance addr="0x200E0000" reg_inst="0"/> |
| <instance addr="0x210E0000" reg_inst="1"/> |
| <instance addr="0x220E0000" reg_inst="2"/> |
| <instance addr="0x230E0000" reg_inst="3"/> |
| <instance addr="0x240E0000" reg_inst="4"/> |
| <instance addr="0x250E0000" reg_inst="5"/> |
| <instance addr="0x260E0000" reg_inst="6"/> |
| <instance addr="0x270E0000" reg_inst="7"/> |
| </register> |
| <register name="EQ_QME_FIR_MASK"> |
| <instance addr="0x200E0004" reg_inst="0"/> |
| <instance addr="0x210E0004" reg_inst="1"/> |
| <instance addr="0x220E0004" reg_inst="2"/> |
| <instance addr="0x230E0004" reg_inst="3"/> |
| <instance addr="0x240E0004" reg_inst="4"/> |
| <instance addr="0x250E0004" reg_inst="5"/> |
| <instance addr="0x260E0004" reg_inst="6"/> |
| <instance addr="0x270E0004" reg_inst="7"/> |
| </register> |
| <register name="EQ_QME_FIR_ACT0"> |
| <instance addr="0x200E0008" reg_inst="0"/> |
| <instance addr="0x210E0008" reg_inst="1"/> |
| <instance addr="0x220E0008" reg_inst="2"/> |
| <instance addr="0x230E0008" reg_inst="3"/> |
| <instance addr="0x240E0008" reg_inst="4"/> |
| <instance addr="0x250E0008" reg_inst="5"/> |
| <instance addr="0x260E0008" reg_inst="6"/> |
| <instance addr="0x270E0008" reg_inst="7"/> |
| </register> |
| <register name="EQ_QME_FIR_ACT1"> |
| <instance addr="0x200E000c" reg_inst="0"/> |
| <instance addr="0x210E000c" reg_inst="1"/> |
| <instance addr="0x220E000c" reg_inst="2"/> |
| <instance addr="0x230E000c" reg_inst="3"/> |
| <instance addr="0x240E000c" reg_inst="4"/> |
| <instance addr="0x250E000c" reg_inst="5"/> |
| <instance addr="0x260E000c" reg_inst="6"/> |
| <instance addr="0x270E000c" reg_inst="7"/> |
| </register> |
| <rule attn_type="CS" node_inst="0:7"> |
| <!-- FIR & ~MASK & ~ACT0 & ~ACT1 --> |
| <expr type="and"> |
| <expr type="reg" value1="EQ_QME_FIR"/> |
| <expr type="not"> |
| <expr type="reg" value1="EQ_QME_FIR_MASK"/> |
| </expr> |
| <expr type="not"> |
| <expr type="reg" value1="EQ_QME_FIR_ACT0"/> |
| </expr> |
| <expr type="not"> |
| <expr type="reg" value1="EQ_QME_FIR_ACT1"/> |
| </expr> |
| </expr> |
| </rule> |
| <rule attn_type="RE" node_inst="0:7"> |
| <!-- FIR & ~MASK & ~ACT0 & ACT1 --> |
| <expr type="and"> |
| <expr type="reg" value1="EQ_QME_FIR"/> |
| <expr type="not"> |
| <expr type="reg" value1="EQ_QME_FIR_MASK"/> |
| </expr> |
| <expr type="not"> |
| <expr type="reg" value1="EQ_QME_FIR_ACT0"/> |
| </expr> |
| <expr type="reg" value1="EQ_QME_FIR_ACT1"/> |
| </expr> |
| </rule> |
| <bit pos="0">PPE halted due to an error</bit> |
| <bit pos="1">PPE asserted debug trigger</bit> |
| <bit pos="2">Spare trigger for testing or workarounds</bit> |
| <bit pos="3">PPE asserted a watchdog timeout condition</bit> |
| <bit pos="4">QME hardware detected its own timeout on the PCB Slave interface</bit> |
| <bit pos="5">Block Copy Engine or QME PPE direct access error from the Fabric</bit> |
| <bit pos="6">SRAM Uncorrectable Error</bit> |
| <bit pos="7">SRAM Correctable Error</bit> |
| <bit pos="8">Resonant Clock Table array Parity Error</bit> |
| <bit pos="9">PIG request of PCB interrupt before its previous interrupt completed</bit> |
| <bit pos="10">Scrub timer tick occurred when scrub is still pending</bit> |
| <bit pos="11">QME_LFIR_CTFS_ERR</bit> |
| <bit pos="12">QME_LFIR_CPMS_ERR</bit> |
| <bit pos="13">PGPE Heartbeat Lost from a hw deadman timer controlled by QHB</bit> |
| <bit pos="14">BCE forward progress error</bit> |
| <bit pos="15">Resclk TARGET_PSTATE Change Protocol Error</bit> |
| <bit pos="16">PCB Network or Endpoint Reset occurred when QME was not halted</bit> |
| <bit pos="17">Firmware cleared special wakeup request before SPECIAL_WKUP_DONE</bit> |
| <bit pos="18">A new special wakeup right after previous cleared</bit> |
| <bit pos="19">Core External Interrupt wakeup sources present but disabled by threads</bit> |
| <bit pos="20">Core External Interrupt present but the chiplet is deconfigured</bit> |
| <bit pos="21">Reserved</bit> |
| <bit pos="22">PB read cmd waited too long for lost data (hang)</bit> |
| <bit pos="23">PPE tried to write a protected addr as defined by the SWPR[n] register</bit> |
| <bit pos="24">DTC Sequencer read a UE from SRAM</bit> |
| <bit pos="25">Correctable error detected on incoming data for a PowerBus read</bit> |
| <bit pos="26">UE Detected on incoming data for a PowerBus read</bit> |
| <bit pos="27">SUE Detected on incoming data for a PowerBus read</bit> |
| <bit pos="28">PB Request address hit an invalid entry in the TOPOLOGY XLATE TABLE</bit> |
| <bit pos="29">Parity error detected on a powerbus tag</bit> |
| <bit pos="30">Code attempted to write the PIG register when the previous request was still pending</bit> |
| <bit pos="31">Local access error bit(s) set</bit> |
| <bit pos="32">CE detected on read to the SSA located in QME powerbus routing logic</bit> |
| <bit pos="33">UE detected on read to the SSA located in QME powerbus routing logic</bit> |
| <bit pos="34">Resonant clock CCFG parity error</bit> |
| <bit pos="35">spare</bit> |
| </attn_node> |