commit abc51c2b6fca6ed704c6fd70426faf0038f2e807
author Zane Shelley <zshelle@us.ibm.com> Mon Nov 09 21:35:35 2020 -0600
committer Zane Shelley <zshelle@us.ibm.com> Mon Nov 09 21:41:22 2020 -0600
tree eeba8af0e35390f743f059a51a1ccab52895c4fa
parent 2e38ae5778103c1c74bc8554453efc978fa53f79

Copied Chip Data XML from Hostboot project

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I0a230be8ba2840768e2097fd4e479c8feb8fc452

xml/p10/node_cfir_mc_ucs_ha.xml

diff --git a/xml/p10/node_cfir_mc_ucs_ha.xml b/xml/p10/node_cfir_mc_ucs_ha.xml
new file mode 100644
index 0000000..3934db8
--- /dev/null
+++ b/xml/p10/node_cfir_mc_ucs_ha.xml
@@ -0,0 +1,52 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<attn_node model_ec="P10_10" name="CFIR_MC_UCS_HA" reg_type="SCOM">
+    <register name="CFIR_MC_LOCAL_XSTOP">
+        <instance addr="0x0C040003" reg_inst="0"/>
+        <instance addr="0x0D040003" reg_inst="1"/>
+        <instance addr="0x0E040003" reg_inst="2"/>
+        <instance addr="0x0F040003" reg_inst="3"/>
+    </register>
+    <register name="CFIR_MC_LOCAL_XSTOP_MASK">
+        <instance addr="0x0C040043" reg_inst="0"/>
+        <instance addr="0x0D040043" reg_inst="1"/>
+        <instance addr="0x0E040043" reg_inst="2"/>
+        <instance addr="0x0F040043" reg_inst="3"/>
+    </register>
+    <register name="CFIR_MC_HOSTATTN">
+        <instance addr="0x0C040004" reg_inst="0"/>
+        <instance addr="0x0D040004" reg_inst="1"/>
+        <instance addr="0x0E040004" reg_inst="2"/>
+        <instance addr="0x0F040004" reg_inst="3"/>
+    </register>
+    <register name="CFIR_MC_HOSTATTN_MASK">
+        <instance addr="0x0C040044" reg_inst="0"/>
+        <instance addr="0x0D040044" reg_inst="1"/>
+        <instance addr="0x0E040044" reg_inst="2"/>
+        <instance addr="0x0F040044" reg_inst="3"/>
+    </register>
+    <rule attn_type="UCS" node_inst="0:3">
+        <expr type="and">
+            <expr type="reg" value1="CFIR_MC_LOCAL_XSTOP"/>
+            <expr type="not">
+                <expr type="reg" value1="CFIR_MC_LOCAL_XSTOP_MASK"/>
+            </expr>
+            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+        </expr>
+    </rule>
+    <rule attn_type="HA" node_inst="0:3">
+        <expr type="and">
+            <expr type="reg" value1="CFIR_MC_HOSTATTN"/>
+            <expr type="not">
+                <expr type="reg" value1="CFIR_MC_HOSTATTN_MASK"/>
+            </expr>
+            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+        </expr>
+    </rule>
+    <bit child_node="MC_LOCAL_FIR" node_inst="0,1,2,3" pos="4">Local FIR</bit>
+    <bit child_node="MC_DSTL_FIR" node_inst="0,2,4,6" pos="5">MC Fault Isolation Register (DSTLFIR)</bit>
+    <bit child_node="MC_USTL_FIR" node_inst="0,2,4,6" pos="6">MC Fault Isolation Register (USTLFIR)</bit>
+    <bit child_node="MC_DSTL_FIR" node_inst="1,3,5,7" pos="7">MC Fault Isolation Register (DSTLFIR)</bit>
+    <bit child_node="MC_USTL_FIR" node_inst="1,3,5,7" pos="8">MC Fault Isolation Register (USTLFIR)</bit>
+    <bit child_node="MC_FIR" node_inst="0,1,2,3" pos="9">MC Fault Isolation Register (MCFIR)</bit>
+    <bit child_node="MC_MISC_FIR" node_inst="0,1,2,3" pos="10">MISC Fault Isolation Register</bit>
+</attn_node>