commit abc51c2b6fca6ed704c6fd70426faf0038f2e807
author Zane Shelley <zshelle@us.ibm.com> Mon Nov 09 21:35:35 2020 -0600
committer Zane Shelley <zshelle@us.ibm.com> Mon Nov 09 21:41:22 2020 -0600
tree eeba8af0e35390f743f059a51a1ccab52895c4fa
parent 2e38ae5778103c1c74bc8554453efc978fa53f79

Copied Chip Data XML from Hostboot project

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I0a230be8ba2840768e2097fd4e479c8feb8fc452

xml/p10/node_cfir_paue_cs_re.xml

diff --git a/xml/p10/node_cfir_paue_cs_re.xml b/xml/p10/node_cfir_paue_cs_re.xml
new file mode 100644
index 0000000..a1bcb5a
--- /dev/null
+++ b/xml/p10/node_cfir_paue_cs_re.xml
@@ -0,0 +1,44 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<attn_node model_ec="P10_10" name="CFIR_PAUE_CS_RE" reg_type="SCOM">
+    <register name="CFIR_PAUE_XSTOP">
+        <instance addr="0x10040000" reg_inst="0"/>
+        <instance addr="0x11040000" reg_inst="1"/>
+    </register>
+    <register name="CFIR_PAUE_XSTOP_MASK">
+        <instance addr="0x10040040" reg_inst="0"/>
+        <instance addr="0x11040040" reg_inst="1"/>
+    </register>
+    <register name="CFIR_PAUE_RECOV">
+        <instance addr="0x10040001" reg_inst="0"/>
+        <instance addr="0x11040001" reg_inst="1"/>
+    </register>
+    <register name="CFIR_PAUE_RECOV_MASK">
+        <instance addr="0x10040041" reg_inst="0"/>
+        <instance addr="0x11040041" reg_inst="1"/>
+    </register>
+    <rule attn_type="CS" node_inst="0:1">
+        <expr type="and">
+            <expr type="reg" value1="CFIR_PAUE_XSTOP"/>
+            <expr type="not">
+                <expr type="reg" value1="CFIR_PAUE_XSTOP_MASK"/>
+            </expr>
+            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+        </expr>
+    </rule>
+    <rule attn_type="RE" node_inst="0:1">
+        <expr type="and">
+            <expr type="reg" value1="CFIR_PAUE_RECOV"/>
+            <expr type="not">
+                <expr type="reg" value1="CFIR_PAUE_RECOV_MASK"/>
+            </expr>
+            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+        </expr>
+    </rule>
+    <bit child_node="PAU_LOCAL_FIR" node_inst="0,1" pos="4">Local FIR</bit>
+    <bit child_node="PAU_FIR_0" node_inst="0,3" pos="5">Local FIR register for the PAU (1 of 3)</bit>
+    <bit child_node="PAU_FIR_1" node_inst="0,3" pos="6">Local FIR register for the PAU (2 of 3)</bit>
+    <bit child_node="PAU_FIR_2" node_inst="0,3" pos="7">Local FIR register for the PAU (3 of 3)</bit>
+    <bit child_node="PAU_PHY_FIR" node_inst="0,1" pos="13">Local FIR register for the chip pervasive logic</bit>
+    <bit child_node="PAU_DL_FIR" node_inst="0,1" pos="14">Local FIR register for the chip pervasive logic</bit>
+    <bit child_node="PAU_PTL_FIR" node_inst="0,1" pos="16"/>
+</attn_node>