Copied Chip Data XML from Hostboot project

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I0a230be8ba2840768e2097fd4e479c8feb8fc452
diff --git a/xml/p10/node_cfir_pci_cs_re.xml b/xml/p10/node_cfir_pci_cs_re.xml
new file mode 100644
index 0000000..f13a754
--- /dev/null
+++ b/xml/p10/node_cfir_pci_cs_re.xml
@@ -0,0 +1,46 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<attn_node model_ec="P10_10" name="CFIR_PCI_CS_RE" reg_type="SCOM">
+    <register name="CFIR_PCI_XSTOP">
+        <instance addr="0x08040000" reg_inst="0"/>
+        <instance addr="0x09040000" reg_inst="1"/>
+    </register>
+    <register name="CFIR_PCI_XSTOP_MASK">
+        <instance addr="0x08040040" reg_inst="0"/>
+        <instance addr="0x09040040" reg_inst="1"/>
+    </register>
+    <register name="CFIR_PCI_RECOV">
+        <instance addr="0x08040001" reg_inst="0"/>
+        <instance addr="0x09040001" reg_inst="1"/>
+    </register>
+    <register name="CFIR_PCI_RECOV_MASK">
+        <instance addr="0x08040041" reg_inst="0"/>
+        <instance addr="0x09040041" reg_inst="1"/>
+    </register>
+    <rule attn_type="CS" node_inst="0:1">
+        <expr type="and">
+            <expr type="reg" value1="CFIR_PCI_XSTOP"/>
+            <expr type="not">
+                <expr type="reg" value1="CFIR_PCI_XSTOP_MASK"/>
+            </expr>
+            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+        </expr>
+    </rule>
+    <rule attn_type="RE" node_inst="0:1">
+        <expr type="and">
+            <expr type="reg" value1="CFIR_PCI_RECOV"/>
+            <expr type="not">
+                <expr type="reg" value1="CFIR_PCI_RECOV_MASK"/>
+            </expr>
+            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+        </expr>
+    </rule>
+    <bit child_node="PCI_LOCAL_FIR" node_inst="0,1" pos="4">Local FIR</bit>
+    <bit child_node="PCI_ETU_FIR" node_inst="0,3" pos="5">ETU FIR Register</bit>
+    <bit child_node="PCI_ETU_FIR" node_inst="1,4" pos="6">ETU FIR Register</bit>
+    <bit child_node="PCI_ETU_FIR" node_inst="2,5" pos="7">ETU FIR Register</bit>
+    <bit child_node="PCI_FIR" node_inst="0,3" pos="9">PCI FIR Register</bit>
+    <bit child_node="PCI_FIR" node_inst="1,4" pos="10">PCI FIR Register</bit>
+    <bit child_node="PCI_FIR" node_inst="2,5" pos="11">PCI FIR Register</bit>
+    <bit child_node="PCI_IOP_FIR" node_inst="0,2" pos="12">IOP Local Fault Isolation Register.  Register bits are set for any error condition detected by the IOP.  The IOPFIR will freeze upon logging the first error not masked in IOPMASK.</bit>
+    <bit child_node="PCI_IOP_FIR" node_inst="1,3" pos="13">IOP Local Fault Isolation Register.  Register bits are set for any error condition detected by the IOP.  The IOPFIR will freeze upon logging the first error not masked in IOPMASK.</bit>
+</attn_node>