Copied Chip Data XML from Hostboot project
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I0a230be8ba2840768e2097fd4e479c8feb8fc452
diff --git a/xml/p10/node_eq_ncu_fir.xml b/xml/p10/node_eq_ncu_fir.xml
new file mode 100644
index 0000000..1d40018
--- /dev/null
+++ b/xml/p10/node_eq_ncu_fir.xml
@@ -0,0 +1,68 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<attn_node model_ec="P10_10" name="EQ_NCU_FIR" reg_type="SCOM">
+ <local_fir config="" name="EQ_NCU_FIR">
+ <instance addr="0x20018640" reg_inst="0"/>
+ <instance addr="0x20014640" reg_inst="1"/>
+ <instance addr="0x20012640" reg_inst="2"/>
+ <instance addr="0x20011640" reg_inst="3"/>
+ <instance addr="0x21018640" reg_inst="4"/>
+ <instance addr="0x21014640" reg_inst="5"/>
+ <instance addr="0x21012640" reg_inst="6"/>
+ <instance addr="0x21011640" reg_inst="7"/>
+ <instance addr="0x22018640" reg_inst="8"/>
+ <instance addr="0x22014640" reg_inst="9"/>
+ <instance addr="0x22012640" reg_inst="10"/>
+ <instance addr="0x22011640" reg_inst="11"/>
+ <instance addr="0x23018640" reg_inst="12"/>
+ <instance addr="0x23014640" reg_inst="13"/>
+ <instance addr="0x23012640" reg_inst="14"/>
+ <instance addr="0x23011640" reg_inst="15"/>
+ <instance addr="0x24018640" reg_inst="16"/>
+ <instance addr="0x24014640" reg_inst="17"/>
+ <instance addr="0x24012640" reg_inst="18"/>
+ <instance addr="0x24011640" reg_inst="19"/>
+ <instance addr="0x25018640" reg_inst="20"/>
+ <instance addr="0x25014640" reg_inst="21"/>
+ <instance addr="0x25012640" reg_inst="22"/>
+ <instance addr="0x25011640" reg_inst="23"/>
+ <instance addr="0x26018640" reg_inst="24"/>
+ <instance addr="0x26014640" reg_inst="25"/>
+ <instance addr="0x26012640" reg_inst="26"/>
+ <instance addr="0x26011640" reg_inst="27"/>
+ <instance addr="0x27018640" reg_inst="28"/>
+ <instance addr="0x27014640" reg_inst="29"/>
+ <instance addr="0x27012640" reg_inst="30"/>
+ <instance addr="0x27011640" reg_inst="31"/>
+ <action attn_type="CS" config="00"/>
+ <action attn_type="RE" config="01"/>
+ </local_fir>
+ <bit pos="0">H/W control error.</bit>
+ <bit pos="1">TLBIE control error.</bit>
+ <bit pos="2">TLBIE or SLBIEG received illegal fields from core.</bit>
+ <bit pos="3">Store address machine received addr_err cresp.</bit>
+ <bit pos="4">Load address machine received addr_err cresp.</bit>
+ <bit pos="5">Topology table error - tried accessing invalid entry</bit>
+ <bit pos="6">One the NCU machines triggerd PB into early hang recovery</bit>
+ <bit pos="7">MSGSND received addr_err</bit>
+ <bit pos="8">Store data parity error from regfile detected.</bit>
+ <bit pos="9">Store timed out on PB.</bit>
+ <bit pos="10">TLBIE master timed out on PB.</bit>
+ <bit pos="11">TLBIE snooper timed out waiting for core.</bit>
+ <bit pos="12">IMA received addr_err cresp.</bit>
+ <bit pos="13">TLBIE/sync machine received addr_err cresp.</bit>
+ <bit pos="14">PMISC received address error cresp.</bit>
+ <bit pos="15">cHTM logic recieve an HTM/IMA packet that it wasn't setup for</bit>
+ <bit pos="16">Spare fir bits.</bit>
+ <bit pos="17">Spare fir bits.</bit>
+ <bit pos="18">Spare fir bits.</bit>
+ <bit pos="19">PPE write received ack_dead</bit>
+ <bit pos="20">Darn ttype while darn not enabled.</bit>
+ <bit pos="21">Darn Address Error cresp.</bit>
+ <bit pos="22">Spare fir bits.</bit>
+ <bit pos="23">Spare fir bits.</bit>
+ <bit pos="24">Spare fir bits.</bit>
+ <bit pos="25">Spare fir bits.</bit>
+ <bit pos="26">Spare fir bits.</bit>
+ <bit pos="27">Spare fir bits.</bit>
+ <bit pos="28">Spare fir bits.</bit>
+</attn_node>