| <?xml version="1.0" encoding="UTF-8"?> |
| <attn_node model_ec="P10_10" name="CFIR_PAUE_CS_RE" reg_type="SCOM"> |
| <register name="CFIR_PAUE_XSTOP"> |
| <instance addr="0x10040000" reg_inst="0"/> |
| <instance addr="0x11040000" reg_inst="1"/> |
| </register> |
| <register name="CFIR_PAUE_XSTOP_MASK"> |
| <instance addr="0x10040040" reg_inst="0"/> |
| <instance addr="0x11040040" reg_inst="1"/> |
| </register> |
| <register name="CFIR_PAUE_RECOV"> |
| <instance addr="0x10040001" reg_inst="0"/> |
| <instance addr="0x11040001" reg_inst="1"/> |
| </register> |
| <register name="CFIR_PAUE_RECOV_MASK"> |
| <instance addr="0x10040041" reg_inst="0"/> |
| <instance addr="0x11040041" reg_inst="1"/> |
| </register> |
| <rule attn_type="CS" node_inst="0:1"> |
| <expr type="and"> |
| <expr type="reg" value1="CFIR_PAUE_XSTOP"/> |
| <expr type="not"> |
| <expr type="reg" value1="CFIR_PAUE_XSTOP_MASK"/> |
| </expr> |
| <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| </expr> |
| </rule> |
| <rule attn_type="RE" node_inst="0:1"> |
| <expr type="and"> |
| <expr type="reg" value1="CFIR_PAUE_RECOV"/> |
| <expr type="not"> |
| <expr type="reg" value1="CFIR_PAUE_RECOV_MASK"/> |
| </expr> |
| <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| </expr> |
| </rule> |
| <bit child_node="PAU_LOCAL_FIR" node_inst="0,1" pos="4">Local FIR</bit> |
| <bit child_node="PAU_FIR_0" node_inst="0,3" pos="5">Local FIR register for the PAU (1 of 3)</bit> |
| <bit child_node="PAU_FIR_1" node_inst="0,3" pos="6">Local FIR register for the PAU (2 of 3)</bit> |
| <bit child_node="PAU_FIR_2" node_inst="0,3" pos="7">Local FIR register for the PAU (3 of 3)</bit> |
| <bit child_node="PAU_PHY_FIR" node_inst="0,1" pos="13">Local FIR register for the chip pervasive logic</bit> |
| <bit child_node="PAU_DL_FIR" node_inst="0,1" pos="14">Local FIR register for the chip pervasive logic</bit> |
| <bit child_node="PAU_PTL_FIR" node_inst="0,1" pos="16"/> |
| </attn_node> |