Update P10 chip data XML
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ia864d6b7cb6bea6f245c0794687b0d32f2a3691c
diff --git a/xml/p10/node_eq_core_fir.xml b/xml/p10/node_eq_core_fir.xml
index 4125951..85e933b 100644
--- a/xml/p10/node_eq_core_fir.xml
+++ b/xml/p10/node_eq_core_fir.xml
@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?>
-<attn_node model_ec="P10_10" name="EQ_CORE_FIR" reg_type="SCOM">
+<attn_node model_ec="P10_20" name="EQ_CORE_FIR" reg_type="SCOM">
<register name="EQ_CORE_FIR">
<instance addr="0x20028440" reg_inst="0"/>
<instance addr="0x20024440" reg_inst="1"/>
@@ -222,7 +222,7 @@
<bit pos="10">reserved</bit>
<bit pos="11">ISU logic recoverable error</bit>
<bit pos="12">ISU logic core checkstop</bit>
- <bit pos="13">ISU recoverable if not in MT window</bit>
+ <bit pos="13">reserved</bit>
<bit pos="14">MCHK received while ME=0 - non recoverable</bit>
<bit pos="15">UE from L2</bit>
<bit pos="16">Number of UEs from L2 above threshold</bit>