xml/p10/node_cfir_pci_ucs.xml

<?xml version="1.0" encoding="UTF-8"?>
<attn_node model_ec="P10_10,P10_20" name="CFIR_PCI_UCS" reg_type="SCOM">
    <register name="CFIR_PCI_LOCAL_XSTOP">
        <instance addr="0x08040003" reg_inst="0"/>
        <instance addr="0x09040003" reg_inst="1"/>
    </register>
    <register name="CFIR_PCI_LOCAL_XSTOP_MASK">
        <instance addr="0x08040043" reg_inst="0"/>
        <instance addr="0x09040043" reg_inst="1"/>
    </register>
    <rule attn_type="UCS" node_inst="0:1">
        <expr type="and">
            <expr type="reg" value1="CFIR_PCI_LOCAL_XSTOP"/>
            <expr type="not">
                <expr type="reg" value1="CFIR_PCI_LOCAL_XSTOP_MASK"/>
            </expr>
            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
        </expr>
    </rule>
    <bit child_node="PCI_LOCAL_FIR" node_inst="0,1" pos="4">Local FIR</bit>
    <bit child_node="PCI_IOP_FIR" node_inst="0,2" pos="12">IOP Local Fault Isolation Register.  Register bits are set for any error condition detected by the IOP.  The IOPFIR will freeze upon logging the first error not masked in IOPMASK.</bit>
    <bit child_node="PCI_IOP_FIR" node_inst="1,3" pos="13">IOP Local Fault Isolation Register.  Register bits are set for any error condition detected by the IOP.  The IOPFIR will freeze upon logging the first error not masked in IOPMASK.</bit>
</attn_node>