blob: c6722fb884ab778a6b0a7768f9d6ed2c4aaa4384 [file] [log] [blame]
Zane Shelley871adec2019-07-30 11:01:39 -05001#pragma once
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -05002
3/**
4 * @brief Models register.It does not contain target.
5 *
6 * This class stores the hash id and bit length of scom registers It models
7 * registers without maintaining target information. Instances of this class
8 * are shared across rule chip objects of same type.Once prd object model is
9 * built, instances of this register are saved in flyweight.These instances
10 * persist as long as prd object model survives.
11 */
12
Zane Shelley52cb1a92019-08-21 14:38:31 -050013#include <hei_includes.hpp>
14#include <register/hei_register.hpp>
15#include <util/hei_bit_string.hpp>
16
Zane Shelleyb77b5732019-08-30 22:01:06 -050017#if 0
Zane Shelleyea1a1ac2019-08-08 16:27:20 -050018#include <prdfHomRegisterAccess.H>
Zane Shelleyb77b5732019-08-30 22:01:06 -050019#endif
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050020
Zane Shelley871adec2019-07-30 11:01:39 -050021namespace libhei
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050022{
23
Zane Shelleyb77b5732019-08-30 22:01:06 -050024#if 0
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050025// Forward References
26class CHIP_CLASS;
27class MopsRegisterAccess;
28class ExtensibleChip;
Zane Shelleyb77b5732019-08-30 22:01:06 -050029#endif
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050030
Zane Shelleycd36f432019-08-30 21:22:07 -050031class HardwareRegister : public Register
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050032{
Zane Shelleyb77b5732019-08-30 22:01:06 -050033#if 0
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050034 public:
35
36 /**
37 * @brief constructor
38 * @param i_address address of the register
39 * @param i_bitLength bit length of register
40 * @param i_targetType target type associated with register
41 */
Zane Shelleycd36f432019-08-30 21:22:07 -050042 HardwareRegister( uint64_t i_address, uint32_t i_bitLength,
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050043 TARGETING::TYPE i_targetType, AccessLevel i_access ) :
Zane Shelley23244cb2019-08-30 21:12:12 -050044 Register(),
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050045 iv_bitLength( i_bitLength ),
46 iv_chipType( i_targetType ),
47 iv_scomAddress( i_address ),
48 iv_operationType( i_access )
49 {}
50
51 /**
52 * @brief constructor .Added this because we save object of this type in
53 * @ FlyweightS
54 */
Zane Shelleycd36f432019-08-30 21:22:07 -050055 HardwareRegister():
Zane Shelley23244cb2019-08-30 21:12:12 -050056 Register(),
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050057 iv_bitLength( 0 ),
58 iv_chipType( TARGETING::TYPE_NA ),
59 iv_scomAddress( 0 ),
60 iv_operationType( ACCESS_NONE )
61 {}
62
63 /**
64 * @brief Returns the pointer to bit string
65 * @param i_type attention type
66 * @return BitString * pointer to bit string
67 */
68
69 virtual const BitString * GetBitString(ATTENTION_TYPE i_type =
70 INVALID_ATTENTION_TYPE) const;
71 /**
72 * @brief Updates bit string contents associated with register
73 * @param i_bs poiner to bit string
74 * @return Nil
75 */
76
77 virtual void SetBitString(const BitString * i_bs) ;
78
79 /**
80 * @brief Returns length of the bits string associated with register
81 * @return length of bit string
82 */
83 uint32_t GetBitLength(void) const { return iv_bitLength ;}
84
85 /**
86 * @brief Directly reads from hardware register
87 * @return SUCCESS|FAIL
88 */
89 virtual uint32_t ForceRead() const;
90
91 /**
92 * @brief Returns contents of register.If entry does not exist in cache
93 * a fresh entry is created and hardware is read.
94 * @return SUCCESS|FAIL
95 */
96 virtual uint32_t Read() const;
97
98 /**
99 * @brief Writes cache contents to register.
100 * @return SUCCESS|FAIL
101 */
102 virtual uint32_t Write();
103
104 /**
105 * @brief Returns the hash id of register
106 * @return returns hash id of register
107 * @pre None
108 * @post None
109 * @note
110 */
111 virtual uint16_t GetId(void) const { return iv_shortId; };
112
113 /**
114 * @brief Sets the hash id of register
115 * @param i_id hash id of register
116 * @return Nil
117 */
118 virtual void SetId(uint16_t i_id) { iv_shortId = i_id; };
119
120 /**
121 * @brief Returns type of Target associated with register.
122 * @return Refer to function description
123 */
124 TARGETING::TYPE getChipType()const{ return iv_chipType ;} ;
125 /**
126 * @brief Returns scom address of register
127 * @return Refer to function description
128 */
129 uint64_t GetAddress( ) const {return iv_scomAddress ;};
130 /**
131 * @brief compares two ScomRegisterAccess register for equality
132 * @param i_rightRegister register to be compared against
133 * @return Returns true if registers are equal false otherwise
134 */
Zane Shelleycd36f432019-08-30 21:22:07 -0500135 bool operator == ( const HardwareRegister & i_rightRegister ) const ;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500136 /**
137 * @brief defines < operation for ScomRegisterAccess
138 * @param i_rightRegister register to be compared against
139 * @return Returns false if i_rightRegisters is less and true otherwise
140 */
Zane Shelleycd36f432019-08-30 21:22:07 -0500141 bool operator < ( const HardwareRegister & i_rightRegister ) const ;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500142 /**
143 * @brief defines >= operation for ScomRegisterAccess
144 * @param i_rightRegister register to be compared against
145 * @return Returns true if registers is >= i_rightRegister false
146 * otherwise
147 */
Zane Shelleycd36f432019-08-30 21:22:07 -0500148 bool operator >= ( const HardwareRegister & i_rightRegister ) const;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500149
150 /** @return The register access level (see enum AccessLevel). */
151 virtual AccessLevel getAccessLevel() const { return iv_operationType; }
152
153 /** @brief Sets the register access level (see enum AccessLevel). */
154 virtual void setAccessLevel( AccessLevel i_op ) { iv_operationType = i_op; }
155
156 protected: // Functions
157
158 /**
159 * @brief copy constructor
160 * @param i_scomRegister scomRegister instance to be copied
161 */
Zane Shelleycd36f432019-08-30 21:22:07 -0500162 HardwareRegister( const Register & i_scomRegister ):
Zane Shelley23244cb2019-08-30 21:12:12 -0500163 Register(),
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500164 iv_bitLength( i_scomRegister.GetBitLength() ),
165 iv_shortId( i_scomRegister.GetId() ),
166 iv_chipType( i_scomRegister.getChipType() ),
167 iv_scomAddress( i_scomRegister.GetAddress() ),
168 iv_operationType( i_scomRegister.getAccessLevel() )
169 {}
170
171 /**
172 * @brief Returns reference to bit string associated with register
173 * @return Refer to function description
174 */
175 virtual BitString & AccessBitString( );
176 /**
177 * @brief Gets the register read and write done by calling access
178 * function of scom accessor service.
179 * @param reference to bit string maintained in caller class
180 * @param Read or write operation
181 * @return [SUCCESS|FAIL]
182 */
183 uint32_t Access( BitString & bs,
Zane Shelleyea1a1ac2019-08-08 16:27:20 -0500184 RegisterAccess::Operation op )const;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500185
186 /**
187 * @brief Returns rulechip pointer associated with the register
188 * @return Refer to function description
189 */
190 virtual ExtensibleChip * getChip() const;
191
192private: // functions
193
194 friend class CaptureData;
195
196 /** @return TRUE if entry for this register exist in this cache. */
197 bool queryCache() const;
198
199 /**
200 * @brief Reads register contents from cache.
201 * @return Reference to bit string buffer maintained in cache.
202 */
203 BitString & readCache() const;
204
205 /**
206 * @brief Deletes one or all entry in the cache
207 * @param RuleChip pointer associated with register
208 * @return Nil
209 */
Zane Shelley05bac982019-09-02 20:57:42 -0500210 void flushCache( ExtensibleChip *i_pChip = nullptr ) const;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500211
212 private: // Data
213
214 uint32_t iv_bitLength; // bit length of scom
215 uint16_t iv_shortId; // unique hash id of register
216 TARGETING::TYPE iv_chipType; // type of target associated with register
217 uint64_t iv_scomAddress; // scom address associated with regiser
218 AccessLevel iv_operationType; // Operation supported (RO, WO, or RW)
219
Zane Shelleyb77b5732019-08-30 22:01:06 -0500220#endif
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500221};
222
Zane Shelley871adec2019-07-30 11:01:39 -0500223} // end namespace libhei
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500224