Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_10,P10_20" name="CFIR_EQ_UCS" reg_type="SCOM"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 3 | <register name="CFIR_EQ_LOCAL_XSTOP"> |
| 4 | <instance addr="0x20040003" reg_inst="0"/> |
| 5 | <instance addr="0x21040003" reg_inst="1"/> |
| 6 | <instance addr="0x22040003" reg_inst="2"/> |
| 7 | <instance addr="0x23040003" reg_inst="3"/> |
| 8 | <instance addr="0x24040003" reg_inst="4"/> |
| 9 | <instance addr="0x25040003" reg_inst="5"/> |
| 10 | <instance addr="0x26040003" reg_inst="6"/> |
| 11 | <instance addr="0x27040003" reg_inst="7"/> |
| 12 | </register> |
| 13 | <register name="CFIR_EQ_LOCAL_XSTOP_MASK"> |
| 14 | <instance addr="0x20040043" reg_inst="0"/> |
| 15 | <instance addr="0x21040043" reg_inst="1"/> |
| 16 | <instance addr="0x22040043" reg_inst="2"/> |
| 17 | <instance addr="0x23040043" reg_inst="3"/> |
| 18 | <instance addr="0x24040043" reg_inst="4"/> |
| 19 | <instance addr="0x25040043" reg_inst="5"/> |
| 20 | <instance addr="0x26040043" reg_inst="6"/> |
| 21 | <instance addr="0x27040043" reg_inst="7"/> |
| 22 | </register> |
| 23 | <rule attn_type="UCS" node_inst="0:7"> |
| 24 | <expr type="and"> |
| 25 | <expr type="reg" value1="CFIR_EQ_LOCAL_XSTOP"/> |
| 26 | <expr type="not"> |
| 27 | <expr type="reg" value1="CFIR_EQ_LOCAL_XSTOP_MASK"/> |
| 28 | </expr> |
| 29 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 30 | </expr> |
| 31 | </rule> |
| 32 | <bit child_node="EQ_LOCAL_FIR" node_inst="0,1,2,3,4,5,6,7" pos="4">Local FIR</bit> |
| 33 | <bit child_node="EQ_CORE_FIR" node_inst="0,4,8,12,16,20,24,28" pos="5">Core Fault Isolation Register</bit> |
| 34 | <bit child_node="EQ_CORE_FIR" node_inst="1,5,9,13,17,21,25,29" pos="6">Core Fault Isolation Register</bit> |
| 35 | <bit child_node="EQ_CORE_FIR" node_inst="2,6,10,14,18,22,26,30" pos="7">Core Fault Isolation Register</bit> |
| 36 | <bit child_node="EQ_CORE_FIR" node_inst="3,7,11,15,19,23,27,31" pos="8">Core Fault Isolation Register</bit> |
| 37 | </attn_node> |