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gerrit.openbmc.org / openbmc / openpower-libhei / 352293d0838d97ca2f72cef07e8af271ae1fc9cb / . / chip_data / odyssey / node_dlx_fir.json
blob: 539db3bc7ee48e386b7e36eee03690d31db9ab8c [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]1{
2 "version": 1,
3 "model_ec": ["ODYSSEY_10"],
4 "registers": {
5 "DLX_FIR": {
6 "instances": {
7 "0": "0x08012400"
8 }
9 },
10 "DLX_FIR_MASK": {
11 "instances": {
12 "0": "0x08012402"
13 }
14 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]15 "DLX_FIR_CFG_CS": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]16 "instances": {
17 "0": "0x08012404"
18 }
19 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]20 "DLX_FIR_CFG_RE": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]21 "instances": {
22 "0": "0x08012405"
23 }
24 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]25 "DLX_FIR_CFG_SPA": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]26 "instances": {
27 "0": "0x08012406"
28 }
29 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]30 "DLX_FIR_CFG_UCS": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]31 "instances": {
32 "0": "0x08012407"
33 }
34 },
35 "DLX_FIR_WOF": {
36 "instances": {
37 "0": "0x08012408"
38 }
39 },
40 "CMN_CONFIG": {
41 "instances": {
42 "0": "0x0801240E"
43 }
44 },
45 "PMU_CNTR": {
46 "instances": {
47 "0": "0x0801240F"
48 }
49 },
50 "DLX_CONFIG0": {
51 "instances": {
52 "0": "0x08012410"
53 }
54 },
55 "DLX_CONFIG1": {
56 "instances": {
57 "0": "0x08012411"
58 }
59 },
60 "DLX_ERR_MASK": {
61 "instances": {
62 "0": "0x08012412"
63 }
64 },
65 "DLX_ERR_RPT": {
66 "instances": {
67 "0": "0x08012413"
68 }
69 },
70 "DLX_EDPL_MAX_COUNT": {
71 "instances": {
72 "0": "0x08012415"
73 }
74 },
75 "DLX_STATUS": {
76 "instances": {
77 "0": "0x08012416"
78 }
79 },
80 "DLX_TRAINING_STATUS": {
81 "instances": {
82 "0": "0x08012417"
83 }
84 },
85 "DLX_RMT_CONFIG": {
86 "instances": {
87 "0": "0x08012418"
88 }
89 },
90 "DLX_RMT_INFO": {
91 "instances": {
92 "0": "0x08012419"
93 }
94 },
95 "DLX_SKIT_CTL": {
96 "instances": {
97 "0": "0x0801241A"
98 }
99 },
100 "DLX_SKIT_STATUS": {
101 "instances": {
102 "0": "0x0801241B"
103 }
104 },
105 "DLX_CYA2": {
106 "instances": {
107 "0": "0x0801241C"
108 }
109 },
110 "DLX_ERR_ACTION": {
111 "instances": {
112 "0": "0x0801241D"
113 }
114 },
115 "DLX_DEBUG_AID": {
116 "instances": {
117 "0": "0x0801241E"
118 }
119 },
120 "DLX_CYA_BITS": {
121 "instances": {
122 "0": "0x0801241F"
123 }
124 }
125 },
126 "isolation_nodes": {
127 "DLX_FIR": {
128 "instances": [0],
129 "rules": [
130 {
131 "attn_type": ["CS"],
132 "node_inst": [0],
133 "expr": {
134 "expr_type": "and",
135 "exprs": [
136 {
137 "expr_type": "reg",
138 "reg_name": "DLX_FIR"
139 },
140 {
141 "expr_type": "not",
142 "expr": {
143 "expr_type": "reg",
144 "reg_name": "DLX_FIR_MASK"
145 }
146 },
147 {
148 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]149 "reg_name": "DLX_FIR_CFG_CS"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]150 }
151 ]
152 }
153 },
154 {
155 "attn_type": ["RE"],
156 "node_inst": [0],
157 "expr": {
158 "expr_type": "and",
159 "exprs": [
160 {
161 "expr_type": "reg",
162 "reg_name": "DLX_FIR"
163 },
164 {
165 "expr_type": "not",
166 "expr": {
167 "expr_type": "reg",
168 "reg_name": "DLX_FIR_MASK"
169 }
170 },
171 {
172 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]173 "reg_name": "DLX_FIR_CFG_RE"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]174 }
175 ]
176 }
177 },
178 {
179 "attn_type": ["SPA"],
180 "node_inst": [0],
181 "expr": {
182 "expr_type": "and",
183 "exprs": [
184 {
185 "expr_type": "reg",
186 "reg_name": "DLX_FIR"
187 },
188 {
189 "expr_type": "not",
190 "expr": {
191 "expr_type": "reg",
192 "reg_name": "DLX_FIR_MASK"
193 }
194 },
195 {
196 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]197 "reg_name": "DLX_FIR_CFG_SPA"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]198 }
199 ]
200 }
201 },
202 {
203 "attn_type": ["UCS"],
204 "node_inst": [0],
205 "expr": {
206 "expr_type": "and",
207 "exprs": [
208 {
209 "expr_type": "reg",
210 "reg_name": "DLX_FIR"
211 },
212 {
213 "expr_type": "not",
214 "expr": {
215 "expr_type": "reg",
216 "reg_name": "DLX_FIR_MASK"
217 }
218 },
219 {
220 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]221 "reg_name": "DLX_FIR_CFG_UCS"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]222 }
223 ]
224 }
225 }
226 ],
227 "bits": {
228 "0": {
229 "desc": "Internal parity error in SCOM component"
230 },
231 "1": {
232 "desc": "DL0 fatal error",
233 "child_node": {
234 "name": "DLX_ERR_RPT",
235 "inst": {
236 "0": 0
237 }
238 }
239 },
240 "2": {
241 "desc": "DL0 buffer UE / insufficient working lanes",
242 "child_node": {
243 "name": "DLX_ERR_RPT",
244 "inst": {
245 "0": 0
246 }
247 }
248 },
249 "3": {
250 "desc": "DL0 CE on TL flit"
251 },
252 "4": {
253 "desc": "DL0 detected a CRC error"
254 },
255 "5": {
256 "desc": "DL0 received a nack"
257 },
258 "6": {
259 "desc": "DL0 running in degraded mode"
260 },
261 "7": {
262 "desc": "DL0 parity error detection on a lane"
263 },
264 "8": {
265 "desc": "DL0 retrained due to no forward progress"
266 },
267 "9": {
268 "desc": "DL0 remote side initiated a retrain"
269 },
270 "10": {
271 "desc": "DL0 retrain due to internal error or software"
272 },
273 "11": {
274 "desc": "DL0 threshold reached"
275 },
276 "12": {
277 "desc": "DL0 trained"
278 },
279 "13": {
280 "desc": "DL0 received replay flit with link_errors bit 0"
281 },
282 "14": {
283 "desc": "DL0 received replay flit with link_errors bit 1"
284 },
285 "15": {
286 "desc": "DL0 received replay flit with link_errors bit 2"
287 },
288 "16": {
289 "desc": "DL0 received replay flit with link_errors bit 3"
290 },
291 "17": {
292 "desc": "DL0 received replay flit with link_errors bit 4"
293 },
294 "18": {
295 "desc": "DL0 received replay flit with link_errors bit 5"
296 },
297 "19": {
298 "desc": "DL0 received replay flit with link_errors bit 6"
299 },
300 "20": {
301 "desc": "DL0 received replay flit with link_errors bit 7"
302 },
303 "21": {
304 "desc": "DL0 skitter error"
305 },
306 "22": {
307 "desc": "DL0 skitter drift detected"
308 },
309 "23:63": {
310 "desc": "reserved"
311 }
312 },
313 "capture_groups": [
314 {
315 "group_name": "DLX_FIR",
316 "group_inst": {
317 "0": 0
318 }
319 }
320 ]
321 }
322 },
323 "capture_groups": {
324 "DLX_FIR": [
325 {
326 "reg_name": "CMN_CONFIG",
327 "reg_inst": {
328 "0": 0
329 }
330 },
331 {
332 "reg_name": "PMU_CNTR",
333 "reg_inst": {
334 "0": 0
335 }
336 },
337 {
338 "reg_name": "DLX_CONFIG0",
339 "reg_inst": {
340 "0": 0
341 }
342 },
343 {
344 "reg_name": "DLX_CONFIG1",
345 "reg_inst": {
346 "0": 0
347 }
348 },
349 {
350 "reg_name": "DLX_ERR_MASK",
351 "reg_inst": {
352 "0": 0
353 }
354 },
355 {
356 "reg_name": "DLX_ERR_RPT",
357 "reg_inst": {
358 "0": 0
359 }
360 },
361 {
362 "reg_name": "DLX_EDPL_MAX_COUNT",
363 "reg_inst": {
364 "0": 0
365 }
366 },
367 {
368 "reg_name": "DLX_STATUS",
369 "reg_inst": {
370 "0": 0
371 }
372 },
373 {
374 "reg_name": "DLX_TRAINING_STATUS",
375 "reg_inst": {
376 "0": 0
377 }
378 },
379 {
380 "reg_name": "DLX_RMT_CONFIG",
381 "reg_inst": {
382 "0": 0
383 }
384 },
385 {
386 "reg_name": "DLX_RMT_INFO",
387 "reg_inst": {
388 "0": 0
389 }
390 },
391 {
392 "reg_name": "DLX_SKIT_CTL",
393 "reg_inst": {
394 "0": 0
395 }
396 },
397 {
398 "reg_name": "DLX_SKIT_STATUS",
399 "reg_inst": {
400 "0": 0
401 }
402 },
403 {
404 "reg_name": "DLX_CYA2",
405 "reg_inst": {
406 "0": 0
407 }
408 },
409 {
410 "reg_name": "DLX_ERR_ACTION",
411 "reg_inst": {
412 "0": 0
413 }
414 },
415 {
416 "reg_name": "DLX_DEBUG_AID",
417 "reg_inst": {
418 "0": 0
419 }
420 },
421 {
422 "reg_name": "DLX_CYA_BITS",
423 "reg_inst": {
424 "0": 0
425 }
426 }
427 ]
428 }
429}