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gerrit.openbmc.org / openbmc / openpower-libhei / 352293d0838d97ca2f72cef07e8af271ae1fc9cb / . / chip_data / odyssey / node_rdf_fir.json
blob: f326b410f88803659593192810e1de7244196171 [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]1{
2 "version": 1,
3 "model_ec": ["ODYSSEY_10"],
4 "registers": {
5 "RDF_FIR": {
6 "instances": {
7 "0": "0x08011800",
8 "1": "0x08012800"
9 }
10 },
11 "RDF_FIR_MASK": {
12 "instances": {
13 "0": "0x08011802",
14 "1": "0x08012802"
15 }
16 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]17 "RDF_FIR_CFG_CS": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]18 "instances": {
19 "0": "0x08011804",
20 "1": "0x08012804"
21 }
22 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]23 "RDF_FIR_CFG_RE": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]24 "instances": {
25 "0": "0x08011805",
26 "1": "0x08012805"
27 }
28 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]29 "RDF_FIR_CFG_SPA": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]30 "instances": {
31 "0": "0x08011806",
32 "1": "0x08012806"
33 }
34 },
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]35 "RDF_FIR_CFG_UCS": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]36 "instances": {
37 "0": "0x08011807",
38 "1": "0x08012807"
39 }
40 },
41 "RDF_FIR_WOF": {
42 "instances": {
43 "0": "0x08011808",
44 "1": "0x08012808"
45 }
46 },
47 "RDF_ERR_RPT_0": {
48 "instances": {
49 "0": "0x0801180E",
50 "1": "0x0801280E"
51 }
52 },
53 "RDF_ERR_RPT_1": {
54 "instances": {
55 "0": "0x0801180F",
56 "1": "0x0801280F"
57 }
58 },
59 "MSR": {
60 "instances": {
61 "0": "0x0801180C",
62 "1": "0x0801280C"
63 }
64 },
65 "HW_MS0": {
66 "instances": {
67 "0": "0x08011810",
68 "1": "0x08012810"
69 }
70 },
71 "HW_MS1": {
72 "instances": {
73 "0": "0x08011811",
74 "1": "0x08012811"
75 }
76 },
77 "HW_MS2": {
78 "instances": {
79 "0": "0x08011812",
80 "1": "0x08012812"
81 }
82 },
83 "HW_MS3": {
84 "instances": {
85 "0": "0x08011813",
86 "1": "0x08012813"
87 }
88 },
89 "HW_MS4": {
90 "instances": {
91 "0": "0x08011814",
92 "1": "0x08012814"
93 }
94 },
95 "HW_MS5": {
96 "instances": {
97 "0": "0x08011815",
98 "1": "0x08012815"
99 }
100 },
101 "HW_MS6": {
102 "instances": {
103 "0": "0x08011816",
104 "1": "0x08012816"
105 }
106 },
107 "HW_MS7": {
108 "instances": {
109 "0": "0x08011817",
110 "1": "0x08012817"
111 }
112 },
113 "FW_MS0": {
114 "instances": {
115 "0": "0x08011818",
116 "1": "0x08012818"
117 }
118 },
119 "FW_MS1": {
120 "instances": {
121 "0": "0x08011819",
122 "1": "0x08012819"
123 }
124 },
125 "FW_MS2": {
126 "instances": {
127 "0": "0x0801181A",
128 "1": "0x0801281A"
129 }
130 },
131 "FW_MS3": {
132 "instances": {
133 "0": "0x0801181B",
134 "1": "0x0801281B"
135 }
136 },
137 "FW_MS4": {
138 "instances": {
139 "0": "0x0801181C",
140 "1": "0x0801281C"
141 }
142 },
143 "FW_MS5": {
144 "instances": {
145 "0": "0x0801181D",
146 "1": "0x0801281D"
147 }
148 },
149 "FW_MS6": {
150 "instances": {
151 "0": "0x0801181E",
152 "1": "0x0801281E"
153 }
154 },
155 "FW_MS7": {
156 "instances": {
157 "0": "0x0801181F",
158 "1": "0x0801281F"
159 }
160 }
161 },
162 "isolation_nodes": {
163 "RDF_FIR": {
164 "instances": [0, 1],
165 "rules": [
166 {
167 "attn_type": ["CS"],
168 "node_inst": [0, 1],
169 "expr": {
170 "expr_type": "and",
171 "exprs": [
172 {
173 "expr_type": "reg",
174 "reg_name": "RDF_FIR"
175 },
176 {
177 "expr_type": "not",
178 "expr": {
179 "expr_type": "reg",
180 "reg_name": "RDF_FIR_MASK"
181 }
182 },
183 {
184 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]185 "reg_name": "RDF_FIR_CFG_CS"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]186 }
187 ]
188 }
189 },
190 {
191 "attn_type": ["RE"],
192 "node_inst": [0, 1],
193 "expr": {
194 "expr_type": "and",
195 "exprs": [
196 {
197 "expr_type": "reg",
198 "reg_name": "RDF_FIR"
199 },
200 {
201 "expr_type": "not",
202 "expr": {
203 "expr_type": "reg",
204 "reg_name": "RDF_FIR_MASK"
205 }
206 },
207 {
208 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]209 "reg_name": "RDF_FIR_CFG_RE"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]210 }
211 ]
212 }
213 },
214 {
215 "attn_type": ["SPA"],
216 "node_inst": [0, 1],
217 "expr": {
218 "expr_type": "and",
219 "exprs": [
220 {
221 "expr_type": "reg",
222 "reg_name": "RDF_FIR"
223 },
224 {
225 "expr_type": "not",
226 "expr": {
227 "expr_type": "reg",
228 "reg_name": "RDF_FIR_MASK"
229 }
230 },
231 {
232 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]233 "reg_name": "RDF_FIR_CFG_SPA"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]234 }
235 ]
236 }
237 },
238 {
239 "attn_type": ["UCS"],
240 "node_inst": [0, 1],
241 "expr": {
242 "expr_type": "and",
243 "exprs": [
244 {
245 "expr_type": "reg",
246 "reg_name": "RDF_FIR"
247 },
248 {
249 "expr_type": "not",
250 "expr": {
251 "expr_type": "reg",
252 "reg_name": "RDF_FIR_MASK"
253 }
254 },
255 {
256 "expr_type": "reg",
Zane Shelley352293d2023-04-06 17:38:15 -0500[diff] [blame^]257 "reg_name": "RDF_FIR_CFG_UCS"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]258 }
259 ]
260 }
261 }
262 ],
263 "bits": {
264 "0": {
265 "desc": "Internal SCOM error"
266 },
267 "1": {
268 "desc": "Mainline read MPE on rank 0"
269 },
270 "2": {
271 "desc": "Mainline read MPE on rank 1"
272 },
273 "3": {
274 "desc": "Mainline read MPE on rank 2"
275 },
276 "4": {
277 "desc": "Mainline read MPE on rank 3"
278 },
279 "5": {
280 "desc": "Mainline read MPE on rank 4"
281 },
282 "6": {
283 "desc": "Mainline read MPE on rank 5"
284 },
285 "7": {
286 "desc": "Mainline read MPE on rank 6"
287 },
288 "8": {
289 "desc": "Mainline read MPE on rank 7"
290 },
291 "9": {
292 "desc": "Mainline read NCE"
293 },
294 "10": {
295 "desc": "Mainline read TCE"
296 },
297 "11": {
298 "desc": "Mainline read SCE"
299 },
300 "12": {
301 "desc": "Mainline read MCE"
302 },
303 "13": {
304 "desc": "Mainline read SUE"
305 },
306 "14": {
307 "desc": "Mainline read AUE"
308 },
309 "15": {
310 "desc": "Mainline read UE"
311 },
312 "16": {
313 "desc": "Mainline read RCD"
314 },
315 "17": {
316 "desc": "Mainline read IAUE"
317 },
318 "18": {
319 "desc": "Mainline read IUE"
320 },
321 "19": {
322 "desc": "Mainline read IRCD"
323 },
324 "20": {
325 "desc": "Mainline read IMPE"
326 },
327 "21": {
328 "desc": "Maintenance MPE on rank 0"
329 },
330 "22": {
331 "desc": "Maintenance MPE on rank 1"
332 },
333 "23": {
334 "desc": "Maintenance MPE on rank 2"
335 },
336 "24": {
337 "desc": "Maintenance MPE on rank 3"
338 },
339 "25": {
340 "desc": "Maintenance MPE on rank 4"
341 },
342 "26": {
343 "desc": "Maintenance MPE on rank 5"
344 },
345 "27": {
346 "desc": "Maintenance MPE on rank 6"
347 },
348 "28": {
349 "desc": "Maintenance MPE on rank 7"
350 },
351 "29": {
352 "desc": "Maintenance NCE"
353 },
354 "30": {
355 "desc": "Maintenance TCE"
356 },
357 "31": {
358 "desc": "Maintenance SCE"
359 },
360 "32": {
361 "desc": "Maintenance MCE"
362 },
363 "33": {
364 "desc": "Maintenance SUE"
365 },
366 "34": {
367 "desc": "Maintenance AUE"
368 },
369 "35": {
370 "desc": "Maintenance UE"
371 },
372 "36": {
373 "desc": "Maintenance RCD"
374 },
375 "37": {
376 "desc": "Maintenance IAUE"
377 },
378 "38": {
379 "desc": "Maintenance IUE"
380 },
381 "39": {
382 "desc": "Maintenance IRCD"
383 },
384 "40": {
385 "desc": "Maintenance IMPE"
386 },
387 "41": {
388 "desc": "RDDATA valid error"
389 },
390 "42": {
391 "desc": "SCOM status register parity error"
392 },
393 "43": {
394 "desc": "SCOM recoverable register parity error"
395 },
396 "44": {
397 "desc": "SCOM unrecoverable register parity error"
398 },
399 "45": {
400 "desc": "ECC corrector internal parity error"
401 },
402 "46": {
403 "desc": "Read buffer ECC CHK Cor CE DW0 Detected"
404 },
405 "47": {
406 "desc": "Read buffer ECC CHK Cor CE DW1 Detected"
407 },
408 "48": {
409 "desc": "Read buffer ECC CHK Cor UE DW0 Detected"
410 },
411 "49": {
412 "desc": "Read buffer ECC CHK Cor UE DW1 Detected"
413 },
414 "50": {
415 "desc": "Prefetch buffer ECC CHK Cor CE DW0 Detected"
416 },
417 "51": {
418 "desc": "Prefetch buffer ECC CHK Cor CE DW1 Detected"
419 },
420 "52": {
421 "desc": "Prefetch buffer ECC CHK Cor UE DW0 Detected"
422 },
423 "53": {
424 "desc": "Prefetch buffer ECC CHK Cor UE DW1 Detected"
425 },
426 "54": {
427 "desc": "Parity error on TLXT to RDF read buffer interface"
428 },
429 "55": {
430 "desc": "Parity error on TLXT to RDF read prefetch interface"
431 },
432 "56:60": {
433 "desc": "reserved"
434 },
435 "61": {
436 "desc": "SCOM register parity error for debug/wat control"
437 },
438 "62": {
439 "desc": "Reserved"
440 }
441 },
442 "capture_groups": [
443 {
444 "group_name": "RDF_FIR",
445 "group_inst": {
446 "0": 0,
447 "1": 1
448 }
449 }
450 ]
451 }
452 },
453 "capture_groups": {
454 "RDF_FIR": [
455 {
456 "reg_name": "RDF_ERR_RPT_0",
457 "reg_inst": {
458 "0": 0,
459 "1": 1
460 }
461 },
462 {
463 "reg_name": "RDF_ERR_RPT_1",
464 "reg_inst": {
465 "0": 0,
466 "1": 1
467 }
468 },
469 {
470 "reg_name": "MSR",
471 "reg_inst": {
472 "0": 0,
473 "1": 1
474 }
475 },
476 {
477 "reg_name": "HWMS0",
478 "reg_inst": {
479 "0": 0,
480 "1": 1
481 }
482 },
483 {
484 "reg_name": "HWMS1",
485 "reg_inst": {
486 "0": 0,
487 "1": 1
488 }
489 },
490 {
491 "reg_name": "HWMS2",
492 "reg_inst": {
493 "0": 0,
494 "1": 1
495 }
496 },
497 {
498 "reg_name": "HWMS3",
499 "reg_inst": {
500 "0": 0,
501 "1": 1
502 }
503 },
504 {
505 "reg_name": "HWMS4",
506 "reg_inst": {
507 "0": 0,
508 "1": 1
509 }
510 },
511 {
512 "reg_name": "HWMS5",
513 "reg_inst": {
514 "0": 0,
515 "1": 1
516 }
517 },
518 {
519 "reg_name": "HWMS6",
520 "reg_inst": {
521 "0": 0,
522 "1": 1
523 }
524 },
525 {
526 "reg_name": "HWMS7",
527 "reg_inst": {
528 "0": 0,
529 "1": 1
530 }
531 },
532 {
533 "reg_name": "FWMS0",
534 "reg_inst": {
535 "0": 0,
536 "1": 1
537 }
538 },
539 {
540 "reg_name": "FWMS1",
541 "reg_inst": {
542 "0": 0,
543 "1": 1
544 }
545 },
546 {
547 "reg_name": "FWMS2",
548 "reg_inst": {
549 "0": 0,
550 "1": 1
551 }
552 },
553 {
554 "reg_name": "FWMS3",
555 "reg_inst": {
556 "0": 0,
557 "1": 1
558 }
559 },
560 {
561 "reg_name": "FWMS4",
562 "reg_inst": {
563 "0": 0,
564 "1": 1
565 }
566 },
567 {
568 "reg_name": "FWMS5",
569 "reg_inst": {
570 "0": 0,
571 "1": 1
572 }
573 },
574 {
575 "reg_name": "FWMS6",
576 "reg_inst": {
577 "0": 0,
578 "1": 1
579 }
580 },
581 {
582 "reg_name": "FWMS7",
583 "reg_inst": {
584 "0": 0,
585 "1": 1
586 }
587 }
588 ]
589 }
590}