Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_10,P10_20" name="CFIR_MC_CS_RE_SPA" reg_type="SCOM"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 3 | <register name="CFIR_MC_CS"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 4 | <instance addr="0x0C040000" reg_inst="0"/> |
| 5 | <instance addr="0x0D040000" reg_inst="1"/> |
| 6 | <instance addr="0x0E040000" reg_inst="2"/> |
| 7 | <instance addr="0x0F040000" reg_inst="3"/> |
| 8 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 9 | <register name="CFIR_MC_CS_MASK"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 10 | <instance addr="0x0C040040" reg_inst="0"/> |
| 11 | <instance addr="0x0D040040" reg_inst="1"/> |
| 12 | <instance addr="0x0E040040" reg_inst="2"/> |
| 13 | <instance addr="0x0F040040" reg_inst="3"/> |
| 14 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 15 | <register name="CFIR_MC_RE"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 16 | <instance addr="0x0C040001" reg_inst="0"/> |
| 17 | <instance addr="0x0D040001" reg_inst="1"/> |
| 18 | <instance addr="0x0E040001" reg_inst="2"/> |
| 19 | <instance addr="0x0F040001" reg_inst="3"/> |
| 20 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 21 | <register name="CFIR_MC_RE_MASK"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 22 | <instance addr="0x0C040041" reg_inst="0"/> |
| 23 | <instance addr="0x0D040041" reg_inst="1"/> |
| 24 | <instance addr="0x0E040041" reg_inst="2"/> |
| 25 | <instance addr="0x0F040041" reg_inst="3"/> |
| 26 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 27 | <register name="CFIR_MC_SPA"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 28 | <instance addr="0x0C040002" reg_inst="0"/> |
| 29 | <instance addr="0x0D040002" reg_inst="1"/> |
| 30 | <instance addr="0x0E040002" reg_inst="2"/> |
| 31 | <instance addr="0x0F040002" reg_inst="3"/> |
| 32 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 33 | <register name="CFIR_MC_SPA_MASK"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 34 | <instance addr="0x0C040042" reg_inst="0"/> |
| 35 | <instance addr="0x0D040042" reg_inst="1"/> |
| 36 | <instance addr="0x0E040042" reg_inst="2"/> |
| 37 | <instance addr="0x0F040042" reg_inst="3"/> |
| 38 | </register> |
| 39 | <rule attn_type="CS" node_inst="0:3"> |
| 40 | <expr type="and"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 41 | <expr type="reg" value1="CFIR_MC_CS"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 42 | <expr type="not"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 43 | <expr type="reg" value1="CFIR_MC_CS_MASK"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 44 | </expr> |
| 45 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 46 | </expr> |
| 47 | </rule> |
| 48 | <rule attn_type="RE" node_inst="0:3"> |
| 49 | <expr type="and"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 50 | <expr type="reg" value1="CFIR_MC_RE"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 51 | <expr type="not"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 52 | <expr type="reg" value1="CFIR_MC_RE_MASK"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 53 | </expr> |
| 54 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 55 | </expr> |
| 56 | </rule> |
| 57 | <rule attn_type="SPA" node_inst="0:3"> |
| 58 | <expr type="and"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 59 | <expr type="reg" value1="CFIR_MC_SPA"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 60 | <expr type="not"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame^] | 61 | <expr type="reg" value1="CFIR_MC_SPA_MASK"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 62 | </expr> |
| 63 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 64 | </expr> |
| 65 | </rule> |
Zane Shelley | 9411933 | 2021-09-22 15:00:43 -0500 | [diff] [blame] | 66 | <bit child_node="MC_LOCAL_FIR" node_inst="0,1,2,3" pos="4">Attention from MC_LOCAL_FIR</bit> |
| 67 | <bit child_node="MC_DSTL_FIR" node_inst="0,2,4,6" pos="5">Attention from MC_DSTL_FIR 0</bit> |
| 68 | <bit child_node="MC_USTL_FIR" node_inst="0,2,4,6" pos="6">Attention from MC_USTL_FIR 0</bit> |
| 69 | <bit child_node="MC_DSTL_FIR" node_inst="1,3,5,7" pos="7">Attention from MC_DSTL_FIR 1</bit> |
| 70 | <bit child_node="MC_USTL_FIR" node_inst="1,3,5,7" pos="8">Attention from MC_USTL_FIR 1</bit> |
| 71 | <bit child_node="MC_FIR" node_inst="0,1,2,3" pos="9">Attention from MC_FIR</bit> |
| 72 | <bit child_node="MC_MISC_FIR" node_inst="0,1,2,3" pos="10">Attention from MC_MISC_FIR</bit> |
| 73 | <bit child_node="MC_OMI_DL_FIR" node_inst="0,2,4,6" pos="13">Attention from MC_OMI_DL_FIR 0</bit> |
| 74 | <bit child_node="MC_OMI_DL_FIR" node_inst="1,3,5,7" pos="14">Attention from MC_OMI_DL_FIR 1</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 75 | </attn_node> |