blob: 138e08c356340cfa8478c0e89aeb2a265c7125db [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -06001{
2 "version": 1,
3 "model_ec": ["ODYSSEY_10"],
4 "registers": {
5 "MMIO_FIR": {
6 "instances": {
7 "0": "0x08010870"
8 }
9 },
10 "MMIO_FIR_MASK": {
11 "instances": {
12 "0": "0x08010872"
13 }
14 },
15 "MMIO_FIR_CFG_XSTOP": {
16 "instances": {
17 "0": "0x08010874"
18 }
19 },
20 "MMIO_FIR_CFG_RECOV": {
21 "instances": {
22 "0": "0x08010875"
23 }
24 },
25 "MMIO_FIR_CFG_ATTN": {
26 "instances": {
27 "0": "0x08010876"
28 }
29 },
30 "MMIO_FIR_CFG_LXSTOP": {
31 "instances": {
32 "0": "0x08010877"
33 }
34 },
35 "MMIO_FIR_WOF": {
36 "instances": {
37 "0": "0x08010878"
38 }
39 },
40 "MMIO_ERR_RPT_0": {
41 "instances": {
42 "0": "0x0801087C"
43 }
44 },
45 "MMIO_ERR_RPT_1": {
46 "instances": {
47 "0": "0x0801087E"
48 }
49 }
50 },
51 "isolation_nodes": {
52 "MMIO_FIR": {
53 "instances": [0],
54 "rules": [
55 {
56 "attn_type": ["CS"],
57 "node_inst": [0],
58 "expr": {
59 "expr_type": "and",
60 "exprs": [
61 {
62 "expr_type": "reg",
63 "reg_name": "MMIO_FIR"
64 },
65 {
66 "expr_type": "not",
67 "expr": {
68 "expr_type": "reg",
69 "reg_name": "MMIO_FIR_MASK"
70 }
71 },
72 {
73 "expr_type": "reg",
74 "reg_name": "MMIO_FIR_CFG_XSTOP"
75 }
76 ]
77 }
78 },
79 {
80 "attn_type": ["RE"],
81 "node_inst": [0],
82 "expr": {
83 "expr_type": "and",
84 "exprs": [
85 {
86 "expr_type": "reg",
87 "reg_name": "MMIO_FIR"
88 },
89 {
90 "expr_type": "not",
91 "expr": {
92 "expr_type": "reg",
93 "reg_name": "MMIO_FIR_MASK"
94 }
95 },
96 {
97 "expr_type": "reg",
98 "reg_name": "MMIO_FIR_CFG_RECOV"
99 }
100 ]
101 }
102 },
103 {
104 "attn_type": ["SPA"],
105 "node_inst": [0],
106 "expr": {
107 "expr_type": "and",
108 "exprs": [
109 {
110 "expr_type": "reg",
111 "reg_name": "MMIO_FIR"
112 },
113 {
114 "expr_type": "not",
115 "expr": {
116 "expr_type": "reg",
117 "reg_name": "MMIO_FIR_MASK"
118 }
119 },
120 {
121 "expr_type": "reg",
122 "reg_name": "MMIO_FIR_CFG_ATTN"
123 }
124 ]
125 }
126 },
127 {
128 "attn_type": ["UCS"],
129 "node_inst": [0],
130 "expr": {
131 "expr_type": "and",
132 "exprs": [
133 {
134 "expr_type": "reg",
135 "reg_name": "MMIO_FIR"
136 },
137 {
138 "expr_type": "not",
139 "expr": {
140 "expr_type": "reg",
141 "reg_name": "MMIO_FIR_MASK"
142 }
143 },
144 {
145 "expr_type": "reg",
146 "reg_name": "MMIO_FIR_CFG_LXSTOP"
147 }
148 ]
149 }
150 }
151 ],
152 "bits": {
153 "0": {
154 "desc": "Interal SCOM logic parity error"
155 },
156 "1": {
157 "desc": "Attempt to access an unimplemented address in the AFU descriptor"
158 },
159 "2": {
160 "desc": "Error detected during MMIO inband or senor cache access"
161 },
162 "3": {
163 "desc": "Parity error in SCOM satellite component FSM"
164 },
165 "4": {
166 "desc": "Parity error in MMIO/CFG logic FSM"
167 },
168 "5": {
169 "desc": "Overflow detected in internal MMIO/CFG logic FIFO"
170 },
171 "6": {
172 "desc": "Fatal parity error detected in control register"
173 },
174 "7": {
175 "desc": "Parity error detected in informational register"
176 },
177 "8": {
178 "desc": "Both start signals asserted to Sensor cache logic"
179 },
180 "9": {
181 "desc": "Multiple parity errors on data from sequencer to sensor cache logic"
182 },
183 "10": {
184 "desc": "State machine parity error in sensor cache logic"
185 },
186 "11": {
187 "desc": "Sensor cache register parity error"
188 },
189 "12": {
190 "desc": "acTAG PASID config error"
191 }
192 },
193 "capture_groups": [
194 {
195 "group_name": "MMIO_FIR",
196 "group_inst": {
197 "0": 0
198 }
199 }
200 ]
201 }
202 },
203 "capture_groups": {
204 "MMIO_FIR": [
205 {
206 "reg_name": "MMIO_ERR_RPT_0",
207 "reg_inst": {
208 "0": 0
209 }
210 },
211 {
212 "reg_name": "MMIO_ERR_RPT_1",
213 "reg_inst": {
214 "0": 0
215 }
216 }
217 ]
218 }
219}