blob: 5be8898ffecefe9dea899f646adb1734cb28c1a1 [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -06001{
2 "version": 1,
3 "model_ec": ["ODYSSEY_10"],
4 "registers": {
5 "SRQ_FIR": {
6 "instances": {
7 "0": "0x08011000"
8 }
9 },
10 "SRQ_FIR_MASK": {
11 "instances": {
12 "0": "0x08011002"
13 }
14 },
15 "SRQ_FIR_CFG_XSTOP": {
16 "instances": {
17 "0": "0x08011004"
18 }
19 },
20 "SRQ_FIR_CFG_RECOV": {
21 "instances": {
22 "0": "0x08011005"
23 }
24 },
25 "SRQ_FIR_CFG_ATTN": {
26 "instances": {
27 "0": "0x08011006"
28 }
29 },
30 "SRQ_FIR_CFG_LXSTOP": {
31 "instances": {
32 "0": "0x08011007"
33 }
34 },
35 "SRQ_FIR_WOF": {
36 "instances": {
37 "0": "0x08011008"
38 }
39 },
40 "SRQ_ERR_RPT": {
41 "instances": {
42 "0": "0x0801101C"
43 }
44 },
45 "MBXLT0": {
46 "instances": {
47 "0": "0x08011012"
48 }
49 },
50 "MBXLT1": {
51 "instances": {
52 "0": "0x08011013"
53 }
54 },
55 "MBXLT2": {
56 "instances": {
57 "0": "0x08011014"
58 }
59 },
60 "MBXLT3": {
61 "instances": {
62 "0": "0x08011021"
63 }
64 },
65 "WESR": {
66 "instances": {
67 "0": "0x08011C06"
68 }
69 },
70 "SRQ_ERR_RPT_HOLD": {
71 "instances": {
72 "0": "0x08011C07"
73 }
74 }
75 },
76 "isolation_nodes": {
77 "SRQ_FIR": {
78 "instances": [0],
79 "rules": [
80 {
81 "attn_type": ["CS"],
82 "node_inst": [0],
83 "expr": {
84 "expr_type": "and",
85 "exprs": [
86 {
87 "expr_type": "reg",
88 "reg_name": "SRQ_FIR"
89 },
90 {
91 "expr_type": "not",
92 "expr": {
93 "expr_type": "reg",
94 "reg_name": "SRQ_FIR_MASK"
95 }
96 },
97 {
98 "expr_type": "reg",
99 "reg_name": "SRQ_FIR_CFG_XSTOP"
100 }
101 ]
102 }
103 },
104 {
105 "attn_type": ["RE"],
106 "node_inst": [0],
107 "expr": {
108 "expr_type": "and",
109 "exprs": [
110 {
111 "expr_type": "reg",
112 "reg_name": "SRQ_FIR"
113 },
114 {
115 "expr_type": "not",
116 "expr": {
117 "expr_type": "reg",
118 "reg_name": "SRQ_FIR_MASK"
119 }
120 },
121 {
122 "expr_type": "reg",
123 "reg_name": "SRQ_FIR_CFG_RECOV"
124 }
125 ]
126 }
127 },
128 {
129 "attn_type": ["SPA"],
130 "node_inst": [0],
131 "expr": {
132 "expr_type": "and",
133 "exprs": [
134 {
135 "expr_type": "reg",
136 "reg_name": "SRQ_FIR"
137 },
138 {
139 "expr_type": "not",
140 "expr": {
141 "expr_type": "reg",
142 "reg_name": "SRQ_FIR_MASK"
143 }
144 },
145 {
146 "expr_type": "reg",
147 "reg_name": "SRQ_FIR_CFG_ATTN"
148 }
149 ]
150 }
151 },
152 {
153 "attn_type": ["UCS"],
154 "node_inst": [0],
155 "expr": {
156 "expr_type": "and",
157 "exprs": [
158 {
159 "expr_type": "reg",
160 "reg_name": "SRQ_FIR"
161 },
162 {
163 "expr_type": "not",
164 "expr": {
165 "expr_type": "reg",
166 "reg_name": "SRQ_FIR_MASK"
167 }
168 },
169 {
170 "expr_type": "reg",
171 "reg_name": "SRQ_FIR_CFG_LXSTOP"
172 }
173 ]
174 }
175 }
176 ],
177 "bits": {
178 "0": {
179 "desc": "Internal parity error"
180 },
181 "1": {
182 "desc": "SRQ nonrecoverable parity error"
183 },
184 "2": {
185 "desc": "refresh overrun port0"
186 },
187 "3": {
188 "desc": "WAT error"
189 },
190 "4": {
191 "desc": "RCD parity error port0"
192 },
193 "5": {
194 "desc": "MCB control logic Error in NCF"
195 },
196 "6": {
197 "desc": "Emergency throttle engaged"
198 },
199 "7": {
200 "desc": "DSM errors port0"
201 },
202 "8": {
203 "desc": "event_n was active on the DDR interface port0"
204 },
205 "9": {
206 "desc": "WRQ or RRQ is in a hung state port0"
207 },
208 "10": {
209 "desc": "state machine one hot error port0"
210 },
211 "11": {
212 "desc": "ROQ errors port0"
213 },
214 "12": {
215 "desc": "Address parity error seen internal to sequencer on read or write command port0"
216 },
217 "13": {
218 "desc": "port0 has failed due to a persistent retry"
219 },
220 "14": {
221 "desc": "informational register parity error"
222 },
223 "15": {
224 "desc": "soft error reported from error report register"
225 },
226 "16": {
227 "desc": "WDF unrecoverable mainline error"
228 },
229 "17": {
230 "desc": "WDF mmio error"
231 },
232 "18": {
233 "desc": "WDF array UE on mainline operations (SUE put in mem)"
234 },
235 "19": {
236 "desc": "WDF mainline dataflow error (SUE not reliably put in mem)"
237 },
238 "20": {
239 "desc": "WDF scom register parity error, affecting mainline config"
240 },
241 "21": {
242 "desc": "WDF scom register parity error, affecting scom ops only"
243 },
244 "22": {
245 "desc": "WDF SCOM fsm parity error"
246 },
247 "23": {
248 "desc": "WDF write buffer array CE"
249 },
250 "24": {
251 "desc": "refresh management CE port0"
252 },
253 "25": {
254 "desc": "refresh management RAA counter UE port0"
255 },
256 "26": {
257 "desc": "NCF fifo error port0"
258 },
259 "27": {
260 "desc": "NCF fifo error port1"
261 },
262 "28": {
263 "desc": "memcntl cmd xstop"
264 },
265 "29": {
266 "desc": "SRQ recoverable parity error"
267 },
268 "30": {
269 "desc": "DFI error port0"
270 },
271 "31": {
272 "desc": "xlat addr error port0"
273 },
274 "32": {
275 "desc": "refresh overrun port1"
276 },
277 "33": {
278 "desc": "RCD parity error port1"
279 },
280 "34": {
281 "desc": "DFI error port1"
282 },
283 "35": {
284 "desc": "event_n was active on the DDR interface port1"
285 },
286 "36": {
287 "desc": "WRQ or RRQ is in a hung state port1"
288 },
289 "37": {
290 "desc": "state machine one hot error port1"
291 },
292 "38": {
293 "desc": "ROQ errors port1"
294 },
295 "39": {
296 "desc": "Address parity error seen internal to sequencer on read or write command port1"
297 },
298 "40": {
299 "desc": "port1 has failed due to a persistent retry"
300 },
301 "41": {
302 "desc": "refresh management CE port1"
303 },
304 "42": {
305 "desc": "refresh management RAA counter UE port1"
306 },
307 "43": {
308 "desc": "xlat addr error port1"
309 },
310 "44": {
311 "desc": "check on ccs in progress bit"
312 },
313 "45": {
314 "desc": "DSM errors port1"
315 }
316 },
317 "capture_groups": [
318 {
319 "group_name": "SRQ_FIR",
320 "group_inst": {
321 "0": 0
322 }
323 }
324 ]
325 }
326 },
327 "capture_groups": {
328 "SRQ_FIR": [
329 {
330 "reg_name": "SRQ_ERR_RPT",
331 "reg_inst": {
332 "0": 0
333 }
334 },
335 {
336 "reg_name": "MBXLT0",
337 "reg_inst": {
338 "0": 0
339 }
340 },
341 {
342 "reg_name": "MBXLT1",
343 "reg_inst": {
344 "0": 0
345 }
346 },
347 {
348 "reg_name": "MBXLT2",
349 "reg_inst": {
350 "0": 0
351 }
352 },
353 {
354 "reg_name": "MBXLT3",
355 "reg_inst": {
356 "0": 0
357 }
358 },
359 {
360 "reg_name": "WESR",
361 "reg_inst": {
362 "0": 0
363 }
364 },
365 {
366 "reg_name": "SRQ_ERR_RPT_HOLD",
367 "reg_inst": {
368 "0": 0
369 }
370 }
371 ]
372 }
373}