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Zane Shelleyb406de42019-09-09 16:10:38 -05001/**
2 * @file hei_types.hpp
3 *
4 * This file contains simple types/enums used throughout all of the isolator
5 * code.
6 */
7
8#pragma once
9
10#include <stdint.h>
11
12namespace libhei
13{
14
15/**
Zane Shelley0d4f5622019-10-14 13:02:30 -050016 * A value representing the type of chip that is being accessed. A unique value
17 * will exist for each Chip Data File. During isolation, the user application
18 * will pass these values to the isolator along with pointers to the user
19 * application's chip objects. This tells the isolator which Chip Data File to
20 * reference for each chip.
21 *
22 * Values:
23 * The values are determined by the chip manufacturer. The isolator does not
24 * need to know the possible values because the user application controls
25 * both the Chip Data Files and the input into the isolation function.
Zane Shelley0d4f5622019-10-14 13:02:30 -050026 *
27 * Range:
Zane Shelley13b182b2020-05-07 20:23:45 -050028 * This is defined as a 4-byte field in the Chip Data Files.
Zane Shelleyb406de42019-09-09 16:10:38 -050029 */
Zane Shelley8c093d82020-05-04 22:06:52 -050030using ChipType_t = uint32_t;
Zane Shelleyb406de42019-09-09 16:10:38 -050031
32/**
Zane Shelley0d4f5622019-10-14 13:02:30 -050033 * Different chips will contain different types of registers. Also, a single
34 * chip may also support multiple types of registers. These enum values are
35 * used to communicate to the user application which type of register access is
36 * needed.
37 *
38 * Values:
39 * The supported register types are listed in this enum.
40 *
41 * Range:
Zane Shelley13b182b2020-05-07 20:23:45 -050042 * This is defined as the minimum 1-byte field in the Chip Data Files.
Zane Shelleyb406de42019-09-09 16:10:38 -050043 */
Zane Shelley0d4f5622019-10-14 13:02:30 -050044enum RegisterType_t : uint8_t
45{
Zane Shelley13b182b2020-05-07 20:23:45 -050046 REG_TYPE_SCOM = 0x01, ///< Power Systems SCOM register.
47 REG_TYPE_ID_SCOM = 0x02, ///< Power Systems Indirect SCOM register.
Zane Shelley0d4f5622019-10-14 13:02:30 -050048};
49
50/**
51 * Each register within a chip must have a unique ID. These IDs (combined with
52 * other information) will be passed back to the user application to identify
Zane Shelley13b182b2020-05-07 20:23:45 -050053 * register contents captured for debugging purposes. Note that some registers
54 * will have multiple instances within a chip. An ID will be used for all
55 * instances of a register. See Instance_t for details on the register instance
56 * value.
Zane Shelley0d4f5622019-10-14 13:02:30 -050057 *
58 * Values:
59 * The isolator does not need to know the possible values because the values
Zane Shelley13b182b2020-05-07 20:23:45 -050060 * are passed from the Chip Data Files to the user application.
Zane Shelley0d4f5622019-10-14 13:02:30 -050061 *
62 * Range:
Zane Shelley13b182b2020-05-07 20:23:45 -050063 * This is defined as a 3-byte field in the Chip Data Files, which should be
64 * sufficient to support all the registers on a typical chip.
Zane Shelley0d4f5622019-10-14 13:02:30 -050065 */
Zane Shelley13b182b2020-05-07 20:23:45 -050066using RegisterId_t = uint32_t; // IMPORTANT: see range note above.
Zane Shelley0d4f5622019-10-14 13:02:30 -050067
68/**
Zane Shelley13b182b2020-05-07 20:23:45 -050069 * A chip could contain more than one instance of a register or node. For
70 * example, a register could exist for each instance of a core on a processor
71 * chip. This field will be used to differeniate multiple instances of a
72 * register in order to avoid repeating common information for every instance.
Zane Shelley0d4f5622019-10-14 13:02:30 -050073 *
74 * Values:
Zane Shelley13b182b2020-05-07 20:23:45 -050075 * Not all registers or nodes will have multiple instances. So the default
76 * instance value is 0, which always indicates the first (or only) logical
77 * instance. Then a value of 1-255 can be used for each subsequent instance.
Zane Shelley0d4f5622019-10-14 13:02:30 -050078 *
79 * Range:
Zane Shelley13b182b2020-05-07 20:23:45 -050080 * This is defined as a 1-byte field in the Chip Data Files.
Zane Shelley0d4f5622019-10-14 13:02:30 -050081 */
Zane Shelley13b182b2020-05-07 20:23:45 -050082using Instance_t = uint8_t;
Zane Shelley0d4f5622019-10-14 13:02:30 -050083
84/**
Zane Shelley13b182b2020-05-07 20:23:45 -050085 * This is used to defined a bit field for a register or node.
Zane Shelley93b61ad2019-10-16 20:41:03 -050086 *
87 * Values:
Zane Shelley13b182b2020-05-07 20:23:45 -050088 * The widest supported register type is only 64-bits (value 0-63).
Zane Shelley93b61ad2019-10-16 20:41:03 -050089 *
90 * Range:
Zane Shelley13b182b2020-05-07 20:23:45 -050091 * This is defined as a 1-byte field in the Chip Data Files.
Zane Shelley93b61ad2019-10-16 20:41:03 -050092 */
Zane Shelley13b182b2020-05-07 20:23:45 -050093using BitPosition_t = uint8_t;
Zane Shelley93b61ad2019-10-16 20:41:03 -050094
95/**
Zane Shelley0d4f5622019-10-14 13:02:30 -050096 * The hardware address of a register (right justified).
97 *
98 * Values:
99 * Currently only supporting 1, 2, 4, or 8 byte addresses.
100 *
101 * Range:
102 * The maximum supported address requires an 8-byte field.
103 */
Zane Shelley13b182b2020-05-07 20:23:45 -0500104using RegisterAddress_t = uint64_t;
Zane Shelley0d4f5622019-10-14 13:02:30 -0500105
106/**
Zane Shelley7667b712020-05-11 20:45:40 -0500107 * The hardware register attribute flags.
Zane Shelley0d4f5622019-10-14 13:02:30 -0500108 *
109 * Values:
Zane Shelley7667b712020-05-11 20:45:40 -0500110 * Each bit within this field represents an attribute flag. If the bit is 0,
111 * the flag is disabled. If the bit is 1, the flag is enabled.
Zane Shelley0d4f5622019-10-14 13:02:30 -0500112 *
113 * Range:
Zane Shelley13b182b2020-05-07 20:23:45 -0500114 * This is defined as a 1-byte field in the Chip Data Files.
Zane Shelley0d4f5622019-10-14 13:02:30 -0500115 */
Zane Shelley7667b712020-05-11 20:45:40 -0500116enum RegisterAttributeFlags_t : uint8_t
Zane Shelley0d4f5622019-10-14 13:02:30 -0500117{
Zane Shelley7667b712020-05-11 20:45:40 -0500118 REG_ATTR_ACCESS_READ = 0x80, ///< Register read access access
119 REG_ATTR_ACCESS_WRITE = 0x40, ///< Register write access access
120 REG_ATTR_RESERVED = 0x3f, ///< Reserved/unused bits
Zane Shelley0d4f5622019-10-14 13:02:30 -0500121};
Zane Shelleyb406de42019-09-09 16:10:38 -0500122
Zane Shelley93b61ad2019-10-16 20:41:03 -0500123/**
124 * The Chip Data Files will contain action, rules, etc. based on the supported
125 * attention types listed in this enum. The user application must use the
126 * values defined in this enum in order to maintain consistency across all
127 * chips.
128 *
129 * Values:
130 * The supported attention types are listed in this enum.
131 *
132 * Range:
Zane Shelley13b182b2020-05-07 20:23:45 -0500133 * This is defined as a 1-byte field in the Chip Data Files.
Zane Shelley93b61ad2019-10-16 20:41:03 -0500134 */
135enum AttentionType_t : uint8_t
136{
Zane Shelley7c8faa12019-10-28 22:26:28 -0500137 // clang-format off
138
Zane Shelley93b61ad2019-10-16 20:41:03 -0500139 /** System checkstop hardware attention. Unrecoverable, fatal error. */
140 ATTN_TYPE_CHECKSTOP = 1,
141
142 /** Unit checkstop hardware attention. A unit within the system is no longer
143 * usable but the rest of the system should be able to recover. */
144 ATTN_TYPE_UNIT_CS = 2,
145
146 /** Recoverable hardware attention. The system should be able to continue
147 * uninterrupted, possible degraded functionality. */
148 ATTN_TYPE_RECOVERABLE = 3,
149
150 /** Software or hardware event requiring action by the service processor
151 * firmware. */
152 ATTN_TYPE_SP_ATTN = 4,
153
154 /** Software or hardware event requiring action by the host firmware. */
155 ATTN_TYPE_HOST_ATTN = 5,
Zane Shelley7c8faa12019-10-28 22:26:28 -0500156
157 // clang-format on
Zane Shelley93b61ad2019-10-16 20:41:03 -0500158};
159
Zane Shelleyb406de42019-09-09 16:10:38 -0500160} // end namespace libhei