Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_10,P10_20" name="EQ_L3_FIR" reg_type="SCOM"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 3 | <local_fir config="" name="EQ_L3_FIR"> |
| 4 | <instance addr="0x20018600" reg_inst="0"/> |
| 5 | <instance addr="0x20014600" reg_inst="1"/> |
| 6 | <instance addr="0x20012600" reg_inst="2"/> |
| 7 | <instance addr="0x20011600" reg_inst="3"/> |
| 8 | <instance addr="0x21018600" reg_inst="4"/> |
| 9 | <instance addr="0x21014600" reg_inst="5"/> |
| 10 | <instance addr="0x21012600" reg_inst="6"/> |
| 11 | <instance addr="0x21011600" reg_inst="7"/> |
| 12 | <instance addr="0x22018600" reg_inst="8"/> |
| 13 | <instance addr="0x22014600" reg_inst="9"/> |
| 14 | <instance addr="0x22012600" reg_inst="10"/> |
| 15 | <instance addr="0x22011600" reg_inst="11"/> |
| 16 | <instance addr="0x23018600" reg_inst="12"/> |
| 17 | <instance addr="0x23014600" reg_inst="13"/> |
| 18 | <instance addr="0x23012600" reg_inst="14"/> |
| 19 | <instance addr="0x23011600" reg_inst="15"/> |
| 20 | <instance addr="0x24018600" reg_inst="16"/> |
| 21 | <instance addr="0x24014600" reg_inst="17"/> |
| 22 | <instance addr="0x24012600" reg_inst="18"/> |
| 23 | <instance addr="0x24011600" reg_inst="19"/> |
| 24 | <instance addr="0x25018600" reg_inst="20"/> |
| 25 | <instance addr="0x25014600" reg_inst="21"/> |
| 26 | <instance addr="0x25012600" reg_inst="22"/> |
| 27 | <instance addr="0x25011600" reg_inst="23"/> |
| 28 | <instance addr="0x26018600" reg_inst="24"/> |
| 29 | <instance addr="0x26014600" reg_inst="25"/> |
| 30 | <instance addr="0x26012600" reg_inst="26"/> |
| 31 | <instance addr="0x26011600" reg_inst="27"/> |
| 32 | <instance addr="0x27018600" reg_inst="28"/> |
| 33 | <instance addr="0x27014600" reg_inst="29"/> |
| 34 | <instance addr="0x27012600" reg_inst="30"/> |
| 35 | <instance addr="0x27011600" reg_inst="31"/> |
| 36 | <action attn_type="CS" config="00"/> |
| 37 | <action attn_type="RE" config="01"/> |
| 38 | </local_fir> |
Zane Shelley | 2e4b638 | 2021-09-24 14:22:00 -0500 | [diff] [blame] | 39 | <register name="L3_ERR_RPT0"> |
| 40 | <instance addr="0x20018610" reg_inst="0"/> |
| 41 | <instance addr="0x20014610" reg_inst="1"/> |
| 42 | <instance addr="0x20012610" reg_inst="2"/> |
| 43 | <instance addr="0x20011610" reg_inst="3"/> |
| 44 | <instance addr="0x21018610" reg_inst="4"/> |
| 45 | <instance addr="0x21014610" reg_inst="5"/> |
| 46 | <instance addr="0x21012610" reg_inst="6"/> |
| 47 | <instance addr="0x21011610" reg_inst="7"/> |
| 48 | <instance addr="0x22018610" reg_inst="8"/> |
| 49 | <instance addr="0x22014610" reg_inst="9"/> |
| 50 | <instance addr="0x22012610" reg_inst="10"/> |
| 51 | <instance addr="0x22011610" reg_inst="11"/> |
| 52 | <instance addr="0x23018610" reg_inst="12"/> |
| 53 | <instance addr="0x23014610" reg_inst="13"/> |
| 54 | <instance addr="0x23012610" reg_inst="14"/> |
| 55 | <instance addr="0x23011610" reg_inst="15"/> |
| 56 | <instance addr="0x24018610" reg_inst="16"/> |
| 57 | <instance addr="0x24014610" reg_inst="17"/> |
| 58 | <instance addr="0x24012610" reg_inst="18"/> |
| 59 | <instance addr="0x24011610" reg_inst="19"/> |
| 60 | <instance addr="0x25018610" reg_inst="20"/> |
| 61 | <instance addr="0x25014610" reg_inst="21"/> |
| 62 | <instance addr="0x25012610" reg_inst="22"/> |
| 63 | <instance addr="0x25011610" reg_inst="23"/> |
| 64 | <instance addr="0x26018610" reg_inst="24"/> |
| 65 | <instance addr="0x26014610" reg_inst="25"/> |
| 66 | <instance addr="0x26012610" reg_inst="26"/> |
| 67 | <instance addr="0x26011610" reg_inst="27"/> |
| 68 | <instance addr="0x27018610" reg_inst="28"/> |
| 69 | <instance addr="0x27014610" reg_inst="29"/> |
| 70 | <instance addr="0x27012610" reg_inst="30"/> |
| 71 | <instance addr="0x27011610" reg_inst="31"/> |
| 72 | </register> |
| 73 | <register name="L3_ERR_RPT1"> |
| 74 | <instance addr="0x20018617" reg_inst="0"/> |
| 75 | <instance addr="0x20014617" reg_inst="1"/> |
| 76 | <instance addr="0x20012617" reg_inst="2"/> |
| 77 | <instance addr="0x20011617" reg_inst="3"/> |
| 78 | <instance addr="0x21018617" reg_inst="4"/> |
| 79 | <instance addr="0x21014617" reg_inst="5"/> |
| 80 | <instance addr="0x21012617" reg_inst="6"/> |
| 81 | <instance addr="0x21011617" reg_inst="7"/> |
| 82 | <instance addr="0x22018617" reg_inst="8"/> |
| 83 | <instance addr="0x22014617" reg_inst="9"/> |
| 84 | <instance addr="0x22012617" reg_inst="10"/> |
| 85 | <instance addr="0x22011617" reg_inst="11"/> |
| 86 | <instance addr="0x23018617" reg_inst="12"/> |
| 87 | <instance addr="0x23014617" reg_inst="13"/> |
| 88 | <instance addr="0x23012617" reg_inst="14"/> |
| 89 | <instance addr="0x23011617" reg_inst="15"/> |
| 90 | <instance addr="0x24018617" reg_inst="16"/> |
| 91 | <instance addr="0x24014617" reg_inst="17"/> |
| 92 | <instance addr="0x24012617" reg_inst="18"/> |
| 93 | <instance addr="0x24011617" reg_inst="19"/> |
| 94 | <instance addr="0x25018617" reg_inst="20"/> |
| 95 | <instance addr="0x25014617" reg_inst="21"/> |
| 96 | <instance addr="0x25012617" reg_inst="22"/> |
| 97 | <instance addr="0x25011617" reg_inst="23"/> |
| 98 | <instance addr="0x26018617" reg_inst="24"/> |
| 99 | <instance addr="0x26014617" reg_inst="25"/> |
| 100 | <instance addr="0x26012617" reg_inst="26"/> |
| 101 | <instance addr="0x26011617" reg_inst="27"/> |
| 102 | <instance addr="0x27018617" reg_inst="28"/> |
| 103 | <instance addr="0x27014617" reg_inst="29"/> |
| 104 | <instance addr="0x27012617" reg_inst="30"/> |
| 105 | <instance addr="0x27011617" reg_inst="31"/> |
| 106 | </register> |
| 107 | <capture_group node_inst="0:31"> |
| 108 | <capture_register reg_name="L3_ERR_RPT0" reg_inst= "0:31" /> |
| 109 | <capture_register reg_name="L3_ERR_RPT1" reg_inst= "0:31" /> |
| 110 | </capture_group> |
| 111 | <bit pos="0">No members available for a CGC</bit> |
| 112 | <bit pos="1">L3 attempted to master a CP (Castout/Push) command</bit> |
| 113 | <bit pos="2">Access attempted to use invalid topology table entry</bit> |
| 114 | <bit pos="3">L3 cache CE and UE within a short period</bit> |
| 115 | <bit pos="4">CE detected on L3 cache read</bit> |
| 116 | <bit pos="5">UE detected on L3 cache read</bit> |
| 117 | <bit pos="6">SUE detected on L3 cache read</bit> |
| 118 | <bit pos="7">L3 cache write data CE from Power Bus</bit> |
| 119 | <bit pos="8">L3 cache write data UE from Power Bus</bit> |
| 120 | <bit pos="9">L3 cache write data sue from Power Bus</bit> |
| 121 | <bit pos="10">L3 cache write data CE from L2</bit> |
| 122 | <bit pos="11">L3 cache write data UE from L2</bit> |
| 123 | <bit pos="12">L3 cache write SUE from L2</bit> |
| 124 | <bit pos="13">L3 DIR read CE</bit> |
| 125 | <bit pos="14">L3 Dir read UE</bit> |
| 126 | <bit pos="15">Dir error not found during corr seq</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 127 | <bit pos="16">Received addr_error cresp on Snoop Machine or Castout Operation</bit> |
| 128 | <bit pos="17">Received addr_error cresp for Prefetch Operation</bit> |
Zane Shelley | 2e4b638 | 2021-09-24 14:22:00 -0500 | [diff] [blame] | 129 | <bit pos="18">L3_PB_HANG_POLL</bit> |
| 130 | <bit pos="19">Invalid LRU count error</bit> |
| 131 | <bit pos="20">Reserved</bit> |
| 132 | <bit pos="21">Reserved</bit> |
| 133 | <bit pos="22">Reserved</bit> |
| 134 | <bit pos="23">Prefetch or Write Inject machine PowerBus data hang check</bit> |
| 135 | <bit pos="24">L3 Hw control err</bit> |
| 136 | <bit pos="25">Cache inhibited op in L3 directory</bit> |
| 137 | <bit pos="26">L3 line delete CE done</bit> |
| 138 | <bit pos="27">L3 snooped an incoming LCO</bit> |
| 139 | <bit pos="28">LRU intended to victimize a line, but invalid line selected</bit> |
| 140 | <bit pos="29">L3 cache congruence class deleted</bit> |
| 141 | <bit pos="30">Incoming LCO ID mismatch</bit> |
| 142 | <bit pos="31">L3 PowerBus Master Write CRESP ack_dead</bit> |
| 143 | <bit pos="32">PB Master Read received ack_dead CRESP</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 144 | </attn_node> |