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gerrit.openbmc.org / openbmc / openpower-libhei / 925c3edccffa1a8d9baeb806da56a8709e57f705 / . / chip_data / explorer / node_rdffir.json
blob: eafc6635fedef87c58d4711b8d8c83c4416b96a8 [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]1{
2 "version": 1,
3 "model_ec": ["EXPLORER_11", "EXPLORER_20"],
4 "registers": {
5 "RDFFIR": {
6 "instances": {
7 "0": "0x08011C00"
8 }
9 },
10 "RDFFIR_MASK": {
11 "instances": {
12 "0": "0x08011C03"
13 }
14 },
15 "RDFFIR_ACT0": {
16 "instances": {
17 "0": "0x08011C06"
18 }
19 },
20 "RDFFIR_ACT1": {
21 "instances": {
22 "0": "0x08011C07"
23 }
24 },
25 "RDFFIR_WOF": {
26 "instances": {
27 "0": "0x08011C08"
28 }
29 },
30 "FARB0": {
31 "instances": {
32 "0": "0x08011415"
33 }
34 },
35 "MBSEC0": {
36 "instances": {
37 "0": "0x08011855"
38 }
39 },
40 "MBSEC1": {
41 "instances": {
42 "0": "0x08011856"
43 }
44 },
45 "MBSTR": {
46 "instances": {
47 "0": "0x08011857"
48 }
49 },
50 "MBSSYMEC": {
51 "instances": {
52 "0": "0x08011858",
53 "1": "0x08011859",
54 "2": "0x0801185A",
55 "3": "0x0801185B",
56 "4": "0x0801185C",
57 "5": "0x0801185D",
58 "6": "0x0801185E",
59 "7": "0x0801185F",
60 "8": "0x08011860"
61 }
62 },
63 "MBSMSEC": {
64 "instances": {
65 "0": "0x08011869"
66 }
67 },
68 "MBNCER": {
69 "instances": {
70 "0": "0x0801186A"
71 }
72 },
73 "MBRCER": {
74 "instances": {
75 "0": "0x0801186B"
76 }
77 },
78 "MBMPER": {
79 "instances": {
80 "0": "0x0801186C"
81 }
82 },
83 "MBUER": {
84 "instances": {
85 "0": "0x0801186D"
86 }
87 },
88 "MBAUER": {
89 "instances": {
90 "0": "0x0801186E"
91 }
92 },
93 "MC_ADDR_TRANS0": {
94 "instances": {
95 "0": "0x0801186F"
96 }
97 },
98 "MC_ADDR_TRANS1": {
99 "instances": {
100 "0": "0x08011870"
101 }
102 },
103 "MC_ADDR_TRANS2": {
104 "instances": {
105 "0": "0x08011871"
106 }
107 },
108 "MBSEVR0": {
109 "instances": {
110 "0": "0x0801187E"
111 }
112 },
113 "MCBAGRA": {
114 "instances": {
115 "0": "0x080118D6"
116 }
117 },
118 "MCBMCAT": {
119 "instances": {
120 "0": "0x080118D7"
121 }
122 },
123 "MCB_CNTL": {
124 "instances": {
125 "0": "0x080118DB"
126 }
127 },
128 "MCB_CNTLSTAT": {
129 "instances": {
130 "0": "0x080118DC"
131 }
132 },
133 "MCBCFG": {
134 "instances": {
135 "0": "0x080118E0"
136 }
137 },
138 "EXP_MSR": {
139 "instances": {
140 "0": "0x08011C0C"
141 }
142 },
143 "RDF_ERR_RPT_0": {
144 "instances": {
145 "0": "0x08011C0E"
146 }
147 },
148 "RDF_ERR_RPT_1": {
149 "instances": {
150 "0": "0x08011C0F"
151 }
152 },
153 "HW_MS": {
154 "instances": {
155 "0": "0x08011C10",
156 "1": "0x08011C11",
157 "2": "0x08011C12",
158 "3": "0x08011C13",
159 "4": "0x08011C14",
160 "5": "0x08011C15",
161 "6": "0x08011C16",
162 "7": "0x08011C17"
163 }
164 },
165 "FW_MS": {
166 "instances": {
167 "0": "0x08011C18",
168 "1": "0x08011C19",
169 "2": "0x08011C1A",
170 "3": "0x08011C1B",
171 "4": "0x08011C1C",
172 "5": "0x08011C1D",
173 "6": "0x08011C1E",
174 "7": "0x08011C1F"
175 }
176 }
177 },
178 "isolation_nodes": {
179 "RDFFIR": {
180 "instances": [0],
181 "rules": [
182 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500[diff] [blame^]183 "attn_type": ["CHIP_CS"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]184 "node_inst": [0],
185 "expr": {
186 "expr_type": "and",
187 "exprs": [
188 {
189 "expr_type": "reg",
190 "reg_name": "RDFFIR"
191 },
192 {
193 "expr_type": "not",
194 "expr": {
195 "expr_type": "reg",
196 "reg_name": "RDFFIR_MASK"
197 }
198 },
199 {
200 "expr_type": "not",
201 "expr": {
202 "expr_type": "reg",
203 "reg_name": "RDFFIR_ACT0"
204 }
205 },
206 {
207 "expr_type": "not",
208 "expr": {
209 "expr_type": "reg",
210 "reg_name": "RDFFIR_ACT1"
211 }
212 }
213 ]
214 }
215 },
216 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500[diff] [blame^]217 "attn_type": ["RECOV"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]218 "node_inst": [0],
219 "expr": {
220 "expr_type": "and",
221 "exprs": [
222 {
223 "expr_type": "reg",
224 "reg_name": "RDFFIR"
225 },
226 {
227 "expr_type": "not",
228 "expr": {
229 "expr_type": "reg",
230 "reg_name": "RDFFIR_MASK"
231 }
232 },
233 {
234 "expr_type": "not",
235 "expr": {
236 "expr_type": "reg",
237 "reg_name": "RDFFIR_ACT0"
238 }
239 },
240 {
241 "expr_type": "reg",
242 "reg_name": "RDFFIR_ACT1"
243 }
244 ]
245 }
246 },
247 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500[diff] [blame^]248 "attn_type": ["SP_ATTN"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]249 "node_inst": [0],
250 "expr": {
251 "expr_type": "and",
252 "exprs": [
253 {
254 "expr_type": "reg",
255 "reg_name": "RDFFIR"
256 },
257 {
258 "expr_type": "not",
259 "expr": {
260 "expr_type": "reg",
261 "reg_name": "RDFFIR_MASK"
262 }
263 },
264 {
265 "expr_type": "reg",
266 "reg_name": "RDFFIR_ACT0"
267 },
268 {
269 "expr_type": "not",
270 "expr": {
271 "expr_type": "reg",
272 "reg_name": "RDFFIR_ACT1"
273 }
274 }
275 ]
276 }
277 }
278 ],
279 "bits": {
280 "0": {
281 "desc": "Mainline read MPE on rank 0"
282 },
283 "1": {
284 "desc": "Mainline read MPE on rank 1"
285 },
286 "2": {
287 "desc": "Mainline read MPE on rank 2"
288 },
289 "3": {
290 "desc": "Mainline read MPE on rank 3"
291 },
292 "4": {
293 "desc": "Mainline read MPE on rank 4"
294 },
295 "5": {
296 "desc": "Mainline read MPE on rank 5"
297 },
298 "6": {
299 "desc": "Mainline read MPE on rank 6"
300 },
301 "7": {
302 "desc": "Mainline read MPE on rank 7"
303 },
304 "8": {
305 "desc": "Mainline read NCE"
306 },
307 "9": {
308 "desc": "Mainline read TCE"
309 },
310 "10": {
311 "desc": "Mainline read SCE"
312 },
313 "11": {
314 "desc": "Mainline read MCE"
315 },
316 "12": {
317 "desc": "Mainline read SUE"
318 },
319 "13": {
320 "desc": "Mainline read AUE"
321 },
322 "14": {
323 "desc": "Mainline read UE"
324 },
325 "15": {
326 "desc": "Mainline read RCD"
327 },
328 "16": {
329 "desc": "Mainline read IAUE"
330 },
331 "17": {
332 "desc": "Mainline read IUE"
333 },
334 "18": {
335 "desc": "Mainline read IRCD"
336 },
337 "19": {
338 "desc": "Mainline read IMPE"
339 },
340 "20": {
341 "desc": "Maintenance MPE on rank 0"
342 },
343 "21": {
344 "desc": "Maintenance MPE on rank 1"
345 },
346 "22": {
347 "desc": "Maintenance MPE on rank 2"
348 },
349 "23": {
350 "desc": "Maintenance MPE on rank 3"
351 },
352 "24": {
353 "desc": "Maintenance MPE on rank 4"
354 },
355 "25": {
356 "desc": "Maintenance MPE on rank 5"
357 },
358 "26": {
359 "desc": "Maintenance MPE on rank 6"
360 },
361 "27": {
362 "desc": "Maintenance MPE on rank 7"
363 },
364 "28": {
365 "desc": "Maintenance NCE"
366 },
367 "29": {
368 "desc": "Maintenance TCE"
369 },
370 "30": {
371 "desc": "Maintenance SCE"
372 },
373 "31": {
374 "desc": "Maintenance MCE"
375 },
376 "32": {
377 "desc": "Maintenance SUE"
378 },
379 "33": {
380 "desc": "Maintenance AUE"
381 },
382 "34": {
383 "desc": "Maintenance UE"
384 },
385 "35": {
386 "desc": "Maintenance RCD"
387 },
388 "36": {
389 "desc": "Maintenance IAUE"
390 },
391 "37": {
392 "desc": "Maintenance IUE"
393 },
394 "38": {
395 "desc": "Maintenance IRCD"
396 },
397 "39": {
398 "desc": "Maintenance IMPE"
399 },
400 "40": {
401 "desc": "RDDATA valid error"
402 },
403 "41": {
404 "desc": "SCOM status register parity error"
405 },
406 "42": {
407 "desc": "SCOM recoverable register parity error"
408 },
409 "43": {
410 "desc": "SCOM unrecoverable register parity error"
411 },
412 "44": {
413 "desc": "ECC corrector internal parity error"
414 },
415 "45": {
416 "desc": "Rd Buff ECC CHK Cor CE DW0 Detected"
417 },
418 "46": {
419 "desc": "Rd Buff ECC CHK Cor CE DW1 Detected"
420 },
421 "47": {
422 "desc": "Rd Buff ECC CHK Cor UE DW0 Detected"
423 },
424 "48": {
425 "desc": "Rd Buff ECC CHK Cor UE DW1 Detected"
426 },
427 "49:59": {
428 "desc": "Reserved"
429 },
430 "60": {
431 "desc": "SCOM register parity error for debug/wat control"
432 },
433 "61": {
434 "desc": "Reserved"
435 },
436 "62": {
437 "desc": "Internal SCOM error"
438 },
439 "63": {
440 "desc": "Internal SCOM error copy"
441 }
442 },
443 "capture_groups": [
444 {
445 "group_name": "RDFFIR",
446 "group_inst": {
447 "0": 0
448 }
449 }
450 ]
451 }
452 },
453 "capture_groups": {
454 "RDFFIR": [
455 {
456 "reg_name": "FARB0",
457 "reg_inst": {
458 "0": 0
459 }
460 },
461 {
462 "reg_name": "MBSEC0",
463 "reg_inst": {
464 "0": 0
465 }
466 },
467 {
468 "reg_name": "MBSEC1",
469 "reg_inst": {
470 "0": 0
471 }
472 },
473 {
474 "reg_name": "MBSTR",
475 "reg_inst": {
476 "0": 0
477 }
478 },
479 {
480 "reg_name": "MBSSYMEC",
481 "reg_inst": {
482 "0": 0
483 }
484 },
485 {
486 "reg_name": "MBSSYMEC",
487 "reg_inst": {
488 "0": 1
489 }
490 },
491 {
492 "reg_name": "MBSSYMEC",
493 "reg_inst": {
494 "0": 2
495 }
496 },
497 {
498 "reg_name": "MBSSYMEC",
499 "reg_inst": {
500 "0": 3
501 }
502 },
503 {
504 "reg_name": "MBSSYMEC",
505 "reg_inst": {
506 "0": 4
507 }
508 },
509 {
510 "reg_name": "MBSSYMEC",
511 "reg_inst": {
512 "0": 5
513 }
514 },
515 {
516 "reg_name": "MBSSYMEC",
517 "reg_inst": {
518 "0": 6
519 }
520 },
521 {
522 "reg_name": "MBSSYMEC",
523 "reg_inst": {
524 "0": 7
525 }
526 },
527 {
528 "reg_name": "MBSSYMEC",
529 "reg_inst": {
530 "0": 8
531 }
532 },
533 {
534 "reg_name": "MBSMSEC",
535 "reg_inst": {
536 "0": 0
537 }
538 },
539 {
540 "reg_name": "MBNCER",
541 "reg_inst": {
542 "0": 0
543 }
544 },
545 {
546 "reg_name": "MBRCER",
547 "reg_inst": {
548 "0": 0
549 }
550 },
551 {
552 "reg_name": "MBMPER",
553 "reg_inst": {
554 "0": 0
555 }
556 },
557 {
558 "reg_name": "MBUER",
559 "reg_inst": {
560 "0": 0
561 }
562 },
563 {
564 "reg_name": "MBAUER",
565 "reg_inst": {
566 "0": 0
567 }
568 },
569 {
570 "reg_name": "MC_ADDR_TRANS0",
571 "reg_inst": {
572 "0": 0
573 }
574 },
575 {
576 "reg_name": "MC_ADDR_TRANS1",
577 "reg_inst": {
578 "0": 0
579 }
580 },
581 {
582 "reg_name": "MC_ADDR_TRANS2",
583 "reg_inst": {
584 "0": 0
585 }
586 },
587 {
588 "reg_name": "MBSEVR0",
589 "reg_inst": {
590 "0": 0
591 }
592 },
593 {
594 "reg_name": "MCBAGRA",
595 "reg_inst": {
596 "0": 0
597 }
598 },
599 {
600 "reg_name": "MCBMCAT",
601 "reg_inst": {
602 "0": 0
603 }
604 },
605 {
606 "reg_name": "MCB_CNTL",
607 "reg_inst": {
608 "0": 0
609 }
610 },
611 {
612 "reg_name": "MCB_CNTLSTAT",
613 "reg_inst": {
614 "0": 0
615 }
616 },
617 {
618 "reg_name": "MCBCFG",
619 "reg_inst": {
620 "0": 0
621 }
622 },
623 {
624 "reg_name": "EXP_MSR",
625 "reg_inst": {
626 "0": 0
627 }
628 },
629 {
630 "reg_name": "RDF_ERR_RPT_0",
631 "reg_inst": {
632 "0": 0
633 }
634 },
635 {
636 "reg_name": "RDF_ERR_RPT_1",
637 "reg_inst": {
638 "0": 0
639 }
640 },
641 {
642 "reg_name": "HW_MS",
643 "reg_inst": {
644 "0": 0
645 }
646 },
647 {
648 "reg_name": "HW_MS",
649 "reg_inst": {
650 "0": 1
651 }
652 },
653 {
654 "reg_name": "HW_MS",
655 "reg_inst": {
656 "0": 2
657 }
658 },
659 {
660 "reg_name": "HW_MS",
661 "reg_inst": {
662 "0": 3
663 }
664 },
665 {
666 "reg_name": "HW_MS",
667 "reg_inst": {
668 "0": 4
669 }
670 },
671 {
672 "reg_name": "HW_MS",
673 "reg_inst": {
674 "0": 5
675 }
676 },
677 {
678 "reg_name": "HW_MS",
679 "reg_inst": {
680 "0": 6
681 }
682 },
683 {
684 "reg_name": "HW_MS",
685 "reg_inst": {
686 "0": 7
687 }
688 },
689 {
690 "reg_name": "FW_MS",
691 "reg_inst": {
692 "0": 0
693 }
694 },
695 {
696 "reg_name": "FW_MS",
697 "reg_inst": {
698 "0": 1
699 }
700 },
701 {
702 "reg_name": "FW_MS",
703 "reg_inst": {
704 "0": 2
705 }
706 },
707 {
708 "reg_name": "FW_MS",
709 "reg_inst": {
710 "0": 3
711 }
712 },
713 {
714 "reg_name": "FW_MS",
715 "reg_inst": {
716 "0": 4
717 }
718 },
719 {
720 "reg_name": "FW_MS",
721 "reg_inst": {
722 "0": 5
723 }
724 },
725 {
726 "reg_name": "FW_MS",
727 "reg_inst": {
728 "0": 6
729 }
730 },
731 {
732 "reg_name": "FW_MS",
733 "reg_inst": {
734 "0": 7
735 }
736 }
737 ]
738 }
739}