blob: f8e1a501dbeacec3c6c868839aabb6eefe9cdec8 [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -06001{
2 "version": 1,
3 "model_ec": ["ODYSSEY_10"],
4 "registers": {
5 "TP_LOCAL_FIR": {
6 "instances": {
7 "0": "0x01040100"
8 }
9 },
10 "TP_LOCAL_FIR_MASK": {
11 "instances": {
12 "0": "0x01040102"
13 }
14 },
Zane Shelley925c3ed2023-04-14 13:42:22 -050015 "TP_LOCAL_FIR_CFG_CHIP_CS": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060016 "instances": {
17 "0": "0x01040104"
18 }
19 },
Zane Shelley925c3ed2023-04-14 13:42:22 -050020 "TP_LOCAL_FIR_CFG_RECOV": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060021 "instances": {
22 "0": "0x01040105"
23 }
24 },
Zane Shelley925c3ed2023-04-14 13:42:22 -050025 "TP_LOCAL_FIR_CFG_SP_ATTN": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060026 "instances": {
27 "0": "0x01040106"
28 }
29 },
Zane Shelley925c3ed2023-04-14 13:42:22 -050030 "TP_LOCAL_FIR_CFG_UNIT_CS": {
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060031 "instances": {
32 "0": "0x01040107"
33 }
34 },
35 "TP_LOCAL_FIR_WOF": {
36 "instances": {
37 "0": "0x01040108"
38 }
39 }
40 },
41 "isolation_nodes": {
42 "TP_LOCAL_FIR": {
43 "instances": [0],
44 "rules": [
45 {
Zane Shelley925c3ed2023-04-14 13:42:22 -050046 "attn_type": ["CHIP_CS"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060047 "node_inst": [0],
48 "expr": {
49 "expr_type": "and",
50 "exprs": [
51 {
52 "expr_type": "reg",
53 "reg_name": "TP_LOCAL_FIR"
54 },
55 {
56 "expr_type": "not",
57 "expr": {
58 "expr_type": "reg",
59 "reg_name": "TP_LOCAL_FIR_MASK"
60 }
61 },
62 {
63 "expr_type": "reg",
Zane Shelley925c3ed2023-04-14 13:42:22 -050064 "reg_name": "TP_LOCAL_FIR_CFG_CHIP_CS"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060065 }
66 ]
67 }
68 },
69 {
Zane Shelley925c3ed2023-04-14 13:42:22 -050070 "attn_type": ["RECOV"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060071 "node_inst": [0],
72 "expr": {
73 "expr_type": "and",
74 "exprs": [
75 {
76 "expr_type": "reg",
77 "reg_name": "TP_LOCAL_FIR"
78 },
79 {
80 "expr_type": "not",
81 "expr": {
82 "expr_type": "reg",
83 "reg_name": "TP_LOCAL_FIR_MASK"
84 }
85 },
86 {
87 "expr_type": "reg",
Zane Shelley925c3ed2023-04-14 13:42:22 -050088 "reg_name": "TP_LOCAL_FIR_CFG_RECOV"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060089 }
90 ]
91 }
92 },
93 {
Zane Shelley925c3ed2023-04-14 13:42:22 -050094 "attn_type": ["SP_ATTN"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060095 "node_inst": [0],
96 "expr": {
97 "expr_type": "and",
98 "exprs": [
99 {
100 "expr_type": "reg",
101 "reg_name": "TP_LOCAL_FIR"
102 },
103 {
104 "expr_type": "not",
105 "expr": {
106 "expr_type": "reg",
107 "reg_name": "TP_LOCAL_FIR_MASK"
108 }
109 },
110 {
111 "expr_type": "reg",
Zane Shelley925c3ed2023-04-14 13:42:22 -0500112 "reg_name": "TP_LOCAL_FIR_CFG_SP_ATTN"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600113 }
114 ]
115 }
116 },
117 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500118 "attn_type": ["UNIT_CS"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600119 "node_inst": [0],
120 "expr": {
121 "expr_type": "and",
122 "exprs": [
123 {
124 "expr_type": "reg",
125 "reg_name": "TP_LOCAL_FIR"
126 },
127 {
128 "expr_type": "not",
129 "expr": {
130 "expr_type": "reg",
131 "reg_name": "TP_LOCAL_FIR_MASK"
132 }
133 },
134 {
135 "expr_type": "reg",
Zane Shelley925c3ed2023-04-14 13:42:22 -0500136 "reg_name": "TP_LOCAL_FIR_CFG_UNIT_CS"
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600137 }
138 ]
139 }
140 }
141 ],
142 "bits": {
143 "0": {
144 "desc": "CFIR/LFIR parity error"
145 },
146 "1": {
147 "desc": "CPLT_CTRL - PCB access error"
148 },
149 "2": {
150 "desc": "CC - PCB access error"
151 },
152 "3": {
153 "desc": "CC - clock control error"
154 },
155 "4": {
156 "desc": "PSC - PSCOM Access Error"
157 },
158 "5": {
159 "desc": "PSC - internal or ring interface error"
160 },
161 "6": {
162 "desc": "THERM - various errors"
163 },
164 "7": {
165 "desc": "DBG - SCOM parity fail"
166 },
167 "8": {
168 "desc": "unused"
169 },
170 "9": {
171 "desc": "FSI errors (OTP, I2C)"
172 },
173 "10": {
174 "desc": "Trace00 - SCOM parity error"
175 },
176 "11": {
177 "desc": "ITR - FMU error"
178 },
179 "12": {
180 "desc": "ITR - PCB error"
181 },
182 "13": {
183 "desc": "PCB master - timeout"
184 },
185 "14": {
186 "desc": "I2CM - parity errors"
187 },
188 "15:17": {
189 "desc": "unused"
190 },
191 "18": {
192 "desc": "Error reported from one or more PCB responder - PLL lock/unlock"
193 },
194 "19": {
195 "desc": "SBE - PPE internal hardware error"
196 },
197 "20": {
198 "desc": "SBE - PPE external hardware error"
199 },
200 "21": {
201 "desc": "SBE - PPE code error"
202 },
203 "22": {
204 "desc": "SBE - PPE debug code breakpoint"
205 },
206 "23": {
207 "desc": "SBE - PPE in halted state"
208 },
209 "24": {
210 "desc": "SBE - PPE watchdog timeout"
211 },
212 "25:26": {
213 "desc": "SBE - unused"
214 },
215 "27": {
216 "desc": "SBE - PPE triggers DBG"
217 },
218 "28:29": {
219 "desc": "unused"
220 },
221 "30": {
222 "desc": "PCB controller - multicast group member count underrun"
223 },
224 "31": {
225 "desc": "PCB controller - parity error"
226 },
227 "32:35": {
228 "desc": "unused"
229 },
230 "36": {
231 "desc": "PIBMEM"
232 },
233 "37": {
234 "desc": "PIBMEM"
235 },
236 "38:44": {
237 "desc": "unused"
238 },
239 "45": {
240 "desc": "SPI controller 0 error"
241 },
242 "46:62": {
243 "desc": "unused"
244 },
245 "63": {
246 "desc": "external local checkstop"
247 }
248 }
249 }
250 }
251}