blob: a280e4833024b2898320607ed5a5805b5bb0dee3 [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -06001{
2 "version": 1,
3 "model_ec": ["P10_10"],
4 "registers": {
5 "PSIHB_FIR": {
6 "instances": {
7 "0": "0x03011D00"
8 }
9 },
10 "PSIHB_FIR_MASK": {
11 "instances": {
12 "0": "0x03011D03"
13 }
14 },
15 "PSIHB_FIR_ACT0": {
16 "instances": {
17 "0": "0x03011D06"
18 }
19 },
20 "PSIHB_FIR_ACT1": {
21 "instances": {
22 "0": "0x03011D07"
23 }
24 }
25 },
26 "isolation_nodes": {
27 "PSIHB_FIR": {
28 "instances": [0],
29 "rules": [
30 {
Zane Shelley925c3ed2023-04-14 13:42:22 -050031 "attn_type": ["CHIP_CS"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060032 "node_inst": [0],
33 "expr": {
34 "expr_type": "and",
35 "exprs": [
36 {
37 "expr_type": "reg",
38 "reg_name": "PSIHB_FIR"
39 },
40 {
41 "expr_type": "not",
42 "expr": {
43 "expr_type": "reg",
44 "reg_name": "PSIHB_FIR_MASK"
45 }
46 },
47 {
48 "expr_type": "not",
49 "expr": {
50 "expr_type": "reg",
51 "reg_name": "PSIHB_FIR_ACT0"
52 }
53 },
54 {
55 "expr_type": "not",
56 "expr": {
57 "expr_type": "reg",
58 "reg_name": "PSIHB_FIR_ACT1"
59 }
60 }
61 ]
62 }
63 },
64 {
Zane Shelley925c3ed2023-04-14 13:42:22 -050065 "attn_type": ["RECOV"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060066 "node_inst": [0],
67 "expr": {
68 "expr_type": "and",
69 "exprs": [
70 {
71 "expr_type": "reg",
72 "reg_name": "PSIHB_FIR"
73 },
74 {
75 "expr_type": "not",
76 "expr": {
77 "expr_type": "reg",
78 "reg_name": "PSIHB_FIR_MASK"
79 }
80 },
81 {
82 "expr_type": "not",
83 "expr": {
84 "expr_type": "reg",
85 "reg_name": "PSIHB_FIR_ACT0"
86 }
87 },
88 {
89 "expr_type": "reg",
90 "reg_name": "PSIHB_FIR_ACT1"
91 }
92 ]
93 }
94 }
95 ],
96 "bits": {
97 "0": {
98 "desc": "CE from PowerBus data"
99 },
100 "1": {
101 "desc": "UE from PowerBus data"
102 },
103 "2": {
104 "desc": "SUE from PowerBus data"
105 },
106 "3": {
107 "desc": "Interrupt Condition present in PSIHB"
108 },
109 "4": {
110 "desc": "Interrupt from FSP is being processed"
111 },
112 "5": {
113 "desc": "CE from PSILL data"
114 },
115 "6": {
116 "desc": "UE from PSILL data"
117 },
118 "7": {
119 "desc": "Error bit set, ignores the interrupt mask"
120 },
121 "8": {
122 "desc": "Invalid TType Hit on PHB or FSP bar"
123 },
124 "9": {
125 "desc": "Invalid CResp returned to command issued by PSIHB"
126 },
127 "10": {
128 "desc": "PowerBus time out waiting for data grant"
129 },
130 "11": {
131 "desc": "PB parity error"
132 },
133 "12": {
134 "desc": "FSP tried access to trusted space"
135 },
136 "13": {
137 "desc": "Unexpected PB CRESP or DATA"
138 },
139 "14": {
140 "desc": "Interrupt register change while interrupt still pending"
141 },
142 "15": {
143 "desc": "PSI Interrupt address Error"
144 },
145 "16": {
146 "desc": "OCC Interrupt address Error"
147 },
148 "17": {
149 "desc": "FSI Interrupt address Error"
150 },
151 "18": {
152 "desc": "LPC Interrupt address Error"
153 },
154 "19": {
155 "desc": "LOCAL ERROR Interrupt address Error"
156 },
157 "20": {
158 "desc": "HOST ERROR Interrupt address Error"
159 },
160 "21": {
161 "desc": "PSI global error bit 0"
162 },
163 "22": {
164 "desc": "PSI global error bit 1"
165 },
166 "23": {
167 "desc": "Upstream error"
168 },
169 "24": {
170 "desc": "spare"
171 },
172 "25": {
173 "desc": "spare"
174 },
175 "26": {
176 "desc": "spare"
177 },
178 "27": {
179 "desc": "fir parity Error"
180 }
181 }
182 }
183 }
184}