| Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame^] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
| 2 | <attn_node model_ec="P10_10" name="CFIR_N0_SPA" reg_type="SCOM"> |
| 3 | <register name="CFIR_N0_SPATTN"> |
| 4 | <instance addr="0x02040002" reg_inst="0"/> |
| 5 | </register> |
| 6 | <register name="CFIR_N0_SPATTN_MASK"> |
| 7 | <instance addr="0x02040042" reg_inst="0"/> |
| 8 | </register> |
| 9 | <rule attn_type="SPA" node_inst="0"> |
| 10 | <expr type="and"> |
| 11 | <expr type="reg" value1="CFIR_N0_SPATTN"/> |
| 12 | <expr type="not"> |
| 13 | <expr type="reg" value1="CFIR_N0_SPATTN_MASK"/> |
| 14 | </expr> |
| 15 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 16 | </expr> |
| 17 | </rule> |
| 18 | <bit child_node="N0_LOCAL_FIR" node_inst="0" pos="4">Local FIR</bit> |
| 19 | <bit child_node="INT_CQ_FIR" node_inst="0" pos="7">Primary Error Register for INT_CQ. This contains all of the individual errors detected by INT_CQ, plus summary error indicators from VC and PC (see bits 43:63).</bit> |
| 20 | </attn_node> |