Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 1 | #pragma once |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 2 | |
| 3 | #include <algorithm> |
| 4 | |
Zane Shelley | 52cb1a9 | 2019-08-21 14:38:31 -0500 | [diff] [blame] | 5 | #include <register/hei_register.hpp> |
| 6 | |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 7 | #include <prdrCommon.H> |
| 8 | |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 9 | namespace libhei |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 10 | { |
| 11 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 12 | class NotRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 13 | { |
| 14 | public: |
| 15 | NotRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 16 | Register( ), iv_child(NULL), iv_iBS(0) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 17 | { |
| 18 | iv_bs = &iv_iBS; |
| 19 | } |
| 20 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 21 | NotRegister(Register & i_arg) : |
| 22 | Register( ), iv_child(&i_arg), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 23 | iv_iBS(i_arg.GetBitLength()) |
| 24 | { |
| 25 | iv_bs = &iv_iBS; |
| 26 | } |
| 27 | |
| 28 | NotRegister & operator=(const NotRegister & r) |
| 29 | { |
| 30 | iv_child = r.iv_child; |
| 31 | iv_iBS = r.iv_iBS; |
| 32 | //iv_bs = r.iv_bs; <-- don't do this! |
| 33 | return *this; |
| 34 | } |
| 35 | |
| 36 | virtual uint32_t Read() const { return iv_child->Read(); } |
| 37 | virtual uint32_t Write() { return iv_child->Write(); } |
| 38 | |
| 39 | const BitString * GetBitString( |
| 40 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 41 | { |
| 42 | (*iv_bs) = ~(*iv_child->GetBitString(i_type)); |
| 43 | return iv_bs; |
| 44 | } |
| 45 | |
| 46 | virtual uint16_t GetId() const { return iv_child->GetId(); } |
| 47 | virtual void SetId(uint16_t i_id) {} |
| 48 | |
| 49 | bool operator==(const NotRegister & r) const |
| 50 | { return r.iv_child == iv_child; } |
| 51 | |
| 52 | bool operator<(const NotRegister & r) const |
| 53 | { return iv_child < r.iv_child; } |
| 54 | |
| 55 | bool operator>=(const NotRegister & r) const |
| 56 | { return iv_child >= r.iv_child; } |
| 57 | |
| 58 | protected: |
| 59 | BitString & AccessBitString(void) { return iv_iBS; } |
| 60 | void SetBitString(const BitString *) {} |
| 61 | |
| 62 | private: |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 63 | Register * iv_child; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 64 | |
| 65 | BitStringBuffer * iv_bs; |
| 66 | BitStringBuffer iv_iBS; |
| 67 | }; |
| 68 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 69 | class SummaryRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 70 | { |
| 71 | public: |
| 72 | SummaryRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 73 | Register( ), iv_child(NULL), iv_amount(0), iv_iBS(0) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 74 | { |
| 75 | iv_bs = &iv_iBS; |
| 76 | } |
| 77 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 78 | SummaryRegister(Register & i_arg, uint16_t i_amount) : |
| 79 | Register( ), iv_child(&i_arg), iv_amount(i_amount), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 80 | iv_iBS(i_arg.GetBitLength()) |
| 81 | { |
| 82 | iv_bs = &iv_iBS; |
| 83 | } |
| 84 | |
| 85 | SummaryRegister & operator=(const SummaryRegister & r) |
| 86 | { |
| 87 | iv_child = r.iv_child; |
| 88 | iv_amount = r.iv_amount; |
| 89 | iv_iBS = r.iv_iBS; |
| 90 | //iv_bs = r.iv_bs; <-- don't do this! |
| 91 | return *this; |
| 92 | } |
| 93 | |
| 94 | virtual uint32_t Read() const |
| 95 | { |
| 96 | uint32_t rc = iv_child->Read(); |
| 97 | if ( PRD_SCANCOM_FAILURE == rc ) |
| 98 | { |
| 99 | // This is a bit unusual, but we are going to ignore SCOM failures. |
| 100 | // This takes care of a corner case where one of the summary |
| 101 | // registers in the list returns an error, but there is another |
| 102 | // summary register with an active attention, which would be ignored |
| 103 | // if we return a bad rc. |
| 104 | PRDF_INF( "[SummaryRegister::read] SCOM failure on register ID " |
| 105 | "0x%04x, ignoring error", iv_child->GetId() ); |
| 106 | rc = SUCCESS; |
| 107 | iv_child->clearAllBits(); // just in case |
| 108 | } |
| 109 | return rc; |
| 110 | } |
| 111 | |
| 112 | virtual uint32_t Write() { return iv_child->Write(); } |
| 113 | |
| 114 | const BitString * GetBitString( |
| 115 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 116 | { |
| 117 | iv_bs->clearAll(); |
| 118 | |
| 119 | PRDF::BitString tmp = *iv_child->GetBitString(i_type); |
| 120 | |
| 121 | //if any bits are set in iv_child, then set the iv_amount bit |
| 122 | if (0 != tmp.getSetCount()) |
| 123 | { |
| 124 | iv_bs->setBit(0); |
| 125 | *iv_bs = *iv_bs >> iv_amount; |
| 126 | } |
| 127 | return iv_bs; |
| 128 | } |
| 129 | |
| 130 | virtual uint16_t GetId() const { return iv_child->GetId(); } |
| 131 | virtual void SetId(uint16_t i_id) {} |
| 132 | |
| 133 | bool operator==(const SummaryRegister & r) const |
| 134 | { return (r.iv_child == iv_child) && (r.iv_amount == iv_amount); } |
| 135 | |
| 136 | bool operator<(const SummaryRegister & r) const |
| 137 | { |
| 138 | if (iv_child == r.iv_child) |
| 139 | return iv_amount < r.iv_amount; |
| 140 | return iv_child < r.iv_child; |
| 141 | } |
| 142 | |
| 143 | bool operator>=(const SummaryRegister & r) const |
| 144 | { |
| 145 | if (iv_child == r.iv_child) |
| 146 | return iv_amount >= r.iv_amount; |
| 147 | return iv_child >= r.iv_child; |
| 148 | } |
| 149 | |
| 150 | protected: |
| 151 | BitString & AccessBitString(void) { return iv_iBS; } |
| 152 | void SetBitString(const BitString *) {} |
| 153 | |
| 154 | private: |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 155 | Register * iv_child; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 156 | uint16_t iv_amount; |
| 157 | |
| 158 | BitStringBuffer * iv_bs; |
| 159 | BitStringBuffer iv_iBS; |
| 160 | }; |
| 161 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 162 | class LeftShiftRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 163 | { |
| 164 | public: |
| 165 | LeftShiftRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 166 | Register( ), iv_child(NULL), iv_amount(0), iv_iBS(0) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 167 | { |
| 168 | iv_bs = &iv_iBS; |
| 169 | } |
| 170 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 171 | LeftShiftRegister(Register & i_arg, uint16_t i_amount) : |
| 172 | Register( ), iv_child(&i_arg), iv_amount(i_amount), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 173 | iv_iBS(i_arg.GetBitLength()) |
| 174 | { |
| 175 | iv_bs = &iv_iBS; |
| 176 | } |
| 177 | |
| 178 | LeftShiftRegister & operator=(const LeftShiftRegister & r) |
| 179 | { |
| 180 | iv_child = r.iv_child; |
| 181 | iv_amount = r.iv_amount; |
| 182 | iv_iBS = r.iv_iBS; |
| 183 | //iv_bs = r.iv_bs; <-- don't do this! |
| 184 | return *this; |
| 185 | } |
| 186 | |
| 187 | virtual uint32_t Read() const { return iv_child->Read(); } |
| 188 | virtual uint32_t Write() { return iv_child->Write(); } |
| 189 | |
| 190 | const BitString * GetBitString( |
| 191 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 192 | { |
| 193 | (*iv_bs) = (*iv_child->GetBitString(i_type)) << iv_amount; |
| 194 | return iv_bs; |
| 195 | } |
| 196 | |
| 197 | virtual uint16_t GetId() const { return iv_child->GetId(); } |
| 198 | virtual void SetId(uint16_t i_id) {} |
| 199 | |
| 200 | bool operator==(const LeftShiftRegister & r) const |
| 201 | { return (r.iv_child == iv_child) && (r.iv_amount == iv_amount); } |
| 202 | |
| 203 | bool operator<(const LeftShiftRegister & r) const |
| 204 | { |
| 205 | if (iv_child == r.iv_child) |
| 206 | return iv_amount < r.iv_amount; |
| 207 | return iv_child < r.iv_child; |
| 208 | } |
| 209 | |
| 210 | bool operator>=(const LeftShiftRegister & r) const |
| 211 | { |
| 212 | if (iv_child == r.iv_child) |
| 213 | return iv_amount >= r.iv_amount; |
| 214 | return iv_child >= r.iv_child; |
| 215 | } |
| 216 | |
| 217 | protected: |
| 218 | BitString & AccessBitString(void) { return iv_iBS; } |
| 219 | void SetBitString(const BitString *) {} |
| 220 | |
| 221 | private: |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 222 | Register * iv_child; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 223 | uint16_t iv_amount; |
| 224 | |
| 225 | BitStringBuffer * iv_bs; |
| 226 | BitStringBuffer iv_iBS; |
| 227 | }; |
| 228 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 229 | class RightShiftRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 230 | { |
| 231 | public: |
| 232 | RightShiftRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 233 | Register( ), iv_child(NULL), iv_amount(0), iv_iBS(0) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 234 | { |
| 235 | iv_bs = &iv_iBS; |
| 236 | } |
| 237 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 238 | RightShiftRegister(Register & i_arg, uint16_t i_amount) : |
| 239 | Register( ), iv_child(&i_arg), iv_amount(i_amount), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 240 | iv_iBS(i_arg.GetBitLength()) |
| 241 | { |
| 242 | iv_bs = &iv_iBS; |
| 243 | } |
| 244 | |
| 245 | RightShiftRegister & operator=(const RightShiftRegister & r) |
| 246 | { |
| 247 | iv_child = r.iv_child; |
| 248 | iv_amount = r.iv_amount; |
| 249 | iv_iBS = r.iv_iBS; |
| 250 | //iv_bs = r.iv_bs; <-- don't do this! |
| 251 | return *this; |
| 252 | } |
| 253 | |
| 254 | virtual uint32_t Read() const { return iv_child->Read(); } |
| 255 | virtual uint32_t Write() { return iv_child->Write(); } |
| 256 | |
| 257 | const BitString * GetBitString( |
| 258 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 259 | { |
| 260 | (*iv_bs) = (*iv_child->GetBitString(i_type)) >> iv_amount; |
| 261 | return iv_bs; |
| 262 | } |
| 263 | |
| 264 | virtual uint16_t GetId() const { return iv_child->GetId(); } |
| 265 | virtual void SetId(uint16_t i_id) {} |
| 266 | |
| 267 | bool operator==(const RightShiftRegister & r) const |
| 268 | { return (r.iv_child == iv_child) && (r.iv_amount == iv_amount); } |
| 269 | |
| 270 | bool operator<(const RightShiftRegister & r) const |
| 271 | { |
| 272 | if (iv_child == r.iv_child) |
| 273 | return iv_amount < r.iv_amount; |
| 274 | return iv_child < r.iv_child; |
| 275 | } |
| 276 | |
| 277 | bool operator>=(const RightShiftRegister & r) const |
| 278 | { |
| 279 | if (iv_child == r.iv_child) |
| 280 | return iv_amount >= r.iv_amount; |
| 281 | return iv_child >= r.iv_child; |
| 282 | } |
| 283 | |
| 284 | protected: |
| 285 | BitString & AccessBitString(void) { return iv_iBS; } |
| 286 | void SetBitString(const BitString *) {} |
| 287 | |
| 288 | private: |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 289 | Register * iv_child; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 290 | uint16_t iv_amount; |
| 291 | |
| 292 | BitStringBuffer * iv_bs; |
| 293 | BitStringBuffer iv_iBS; |
| 294 | }; |
| 295 | |
| 296 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 297 | class AndRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 298 | { |
| 299 | public: |
| 300 | AndRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 301 | Register( ), iv_left(NULL), iv_right(NULL), iv_iBS(0) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 302 | { |
| 303 | iv_bs = &iv_iBS; |
| 304 | } |
| 305 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 306 | AndRegister( Register & i_left, |
| 307 | Register & i_right ) : |
| 308 | Register( ), iv_left(&i_left), iv_right(&i_right), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 309 | iv_iBS(std::min(i_left.GetBitLength(), |
| 310 | i_right.GetBitLength())) |
| 311 | { |
| 312 | iv_bs = &iv_iBS; |
| 313 | } |
| 314 | |
| 315 | AndRegister & operator=(const AndRegister & r) |
| 316 | { |
| 317 | iv_left = r.iv_left; |
| 318 | iv_right = r.iv_right; |
| 319 | iv_iBS = r.iv_iBS; |
| 320 | //iv_bs = r.iv_bs; <-- don't do this! |
| 321 | return *this; |
| 322 | } |
| 323 | |
| 324 | virtual uint32_t Read() const |
| 325 | { |
| 326 | return iv_left->Read() | iv_right->Read(); |
| 327 | } |
| 328 | virtual uint32_t Write() |
| 329 | { |
| 330 | return iv_left->Write() | iv_right->Write(); |
| 331 | } |
| 332 | |
| 333 | const BitString * GetBitString( |
| 334 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 335 | { |
| 336 | (*iv_bs) = *iv_left->GetBitString(i_type); |
| 337 | (*iv_bs) = (*iv_bs) & (*iv_right->GetBitString(i_type)); |
| 338 | return iv_bs; |
| 339 | } |
| 340 | |
| 341 | virtual uint16_t GetId() const |
| 342 | { |
| 343 | return Prdr::SignatureOp::combineSig(iv_left->GetId(), |
| 344 | iv_right->GetId()); |
| 345 | } |
| 346 | |
| 347 | virtual void SetId(uint16_t i_id) {} |
| 348 | |
| 349 | bool operator==(const AndRegister & r) const |
| 350 | { return (r.iv_left == iv_left) && (r.iv_right == iv_right); } |
| 351 | |
| 352 | bool operator<(const AndRegister & r) const |
| 353 | { |
| 354 | if (iv_left == r.iv_left) |
| 355 | return iv_right < r.iv_right; |
| 356 | return iv_left < r.iv_left; |
| 357 | } |
| 358 | |
| 359 | bool operator>=(const AndRegister & r) const |
| 360 | { |
| 361 | if (iv_left == r.iv_left) |
| 362 | return iv_right >= r.iv_right; |
| 363 | return iv_left >= r.iv_left; |
| 364 | } |
| 365 | |
| 366 | protected: |
| 367 | BitString & AccessBitString(void) { return iv_iBS; } |
| 368 | void SetBitString(const BitString *) {} |
| 369 | |
| 370 | private: |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 371 | Register * iv_left; |
| 372 | Register * iv_right; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 373 | |
| 374 | BitStringBuffer * iv_bs; |
| 375 | BitStringBuffer iv_iBS; |
| 376 | }; |
| 377 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 378 | class OrRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 379 | { |
| 380 | public: |
| 381 | |
| 382 | OrRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 383 | Register( ), iv_left(NULL), iv_right(NULL), iv_iBS(0) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 384 | { |
| 385 | iv_bs = &iv_iBS; |
| 386 | } |
| 387 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 388 | OrRegister( Register & i_left, |
| 389 | Register & i_right ) : |
| 390 | Register( ), iv_left(&i_left), iv_right(&i_right), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 391 | iv_iBS(std::min(i_left.GetBitLength(), |
| 392 | i_right.GetBitLength())) |
| 393 | { |
| 394 | iv_bs = &iv_iBS; |
| 395 | } |
| 396 | |
| 397 | OrRegister & operator=(const OrRegister & r) |
| 398 | { |
| 399 | iv_left = r.iv_left; |
| 400 | iv_right = r.iv_right; |
| 401 | iv_iBS = r.iv_iBS; |
| 402 | //iv_bs = r.iv_bs; <-- don't do this! |
| 403 | return *this; |
| 404 | } |
| 405 | |
| 406 | virtual uint32_t Read() const |
| 407 | { |
| 408 | return iv_left->Read() | iv_right->Read(); |
| 409 | } |
| 410 | |
| 411 | virtual uint32_t Write() |
| 412 | { |
| 413 | return iv_left->Write() | iv_right->Write(); |
| 414 | } |
| 415 | |
| 416 | const BitString * GetBitString( |
| 417 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE ) const |
| 418 | { |
| 419 | (*iv_bs) = *iv_left->GetBitString(i_type); |
| 420 | (*iv_bs) = (*iv_bs) | (*iv_right->GetBitString(i_type)); |
| 421 | return iv_bs; |
| 422 | } |
| 423 | |
| 424 | virtual uint16_t GetId() const |
| 425 | { |
| 426 | return Prdr::SignatureOp::combineSig( iv_left->GetId(), |
| 427 | iv_right->GetId() ); |
| 428 | } |
| 429 | |
| 430 | virtual void SetId(uint16_t i_id) {} |
| 431 | |
| 432 | bool operator==(const OrRegister & r) const |
| 433 | { return (r.iv_left == iv_left) && (r.iv_right == iv_right); } |
| 434 | |
| 435 | bool operator<(const OrRegister & r) const |
| 436 | { |
| 437 | if (iv_left == r.iv_left) |
| 438 | return iv_right < r.iv_right; |
| 439 | return iv_left < r.iv_left; |
| 440 | } |
| 441 | |
| 442 | bool operator>=(const OrRegister & r) const |
| 443 | { |
| 444 | if (iv_left == r.iv_left) |
| 445 | return iv_right >= r.iv_right; |
| 446 | return iv_left >= r.iv_left; |
| 447 | } |
| 448 | |
| 449 | protected: |
| 450 | BitString & AccessBitString(void) { return iv_iBS; } |
| 451 | void SetBitString(const BitString *) {} |
| 452 | |
| 453 | private: |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 454 | Register * iv_left; |
| 455 | Register * iv_right; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 456 | |
| 457 | BitStringBuffer * iv_bs; |
| 458 | BitStringBuffer iv_iBS; |
| 459 | }; |
| 460 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 461 | class NullRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 462 | { |
| 463 | public: |
| 464 | NullRegister(int size) : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 465 | Register( ), iv_iBS(size) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 466 | {} |
| 467 | |
| 468 | NullRegister & operator=(const NullRegister & r) |
| 469 | { |
| 470 | iv_iBS = r.iv_iBS; |
| 471 | return *this; |
| 472 | } |
| 473 | |
| 474 | virtual uint32_t Read() const { return 0; } |
| 475 | virtual uint32_t Write() { return 0; } |
| 476 | |
| 477 | const BitString * GetBitString( |
| 478 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 479 | { |
| 480 | return &iv_iBS; |
| 481 | } |
| 482 | |
| 483 | protected: |
| 484 | BitString & AccessBitString(void) { return iv_iBS; } |
| 485 | void SetBitString(const BitString *) {} |
| 486 | |
| 487 | private: |
| 488 | BitStringBuffer iv_iBS; |
| 489 | |
| 490 | virtual uint16_t GetId() const |
| 491 | { return Prdr::SignatureOp::DEFAULT_SIGNATURE; } |
| 492 | |
| 493 | virtual void SetId(uint16_t i_id) {} |
| 494 | |
| 495 | }; |
| 496 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 497 | class AttnTypeRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 498 | { |
| 499 | public: |
| 500 | AttnTypeRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 501 | Register( ), iv_check(&cv_null), iv_recov(&cv_null), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 502 | iv_special(&cv_null), iv_proccs(&cv_null), iv_hostattn(&cv_null), |
| 503 | iv_iBS(0) |
| 504 | { |
| 505 | iv_bs = &iv_iBS; |
| 506 | } |
| 507 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 508 | AttnTypeRegister( Register *i_check, |
| 509 | Register *i_recov, |
| 510 | Register *i_special, |
| 511 | Register *i_proccs, |
| 512 | Register *i_hostattn ) : |
| 513 | Register( ), |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 514 | iv_check( NULL == i_check ? &cv_null : i_check), |
| 515 | iv_recov( NULL == i_recov ? &cv_null : i_recov), |
| 516 | iv_special( NULL == i_special ? &cv_null : i_special), |
| 517 | iv_proccs( NULL == i_proccs ? &cv_null : i_proccs), |
| 518 | iv_hostattn( NULL == i_hostattn ? &cv_null : i_hostattn), |
| 519 | iv_iBS(0) // will fully initialize this inside ctor. |
| 520 | { |
| 521 | uint32_t l_length = 1024; |
| 522 | l_length = std::min(l_length, iv_check->GetBitLength()); |
| 523 | l_length = std::min(l_length, iv_recov->GetBitLength()); |
| 524 | l_length = std::min(l_length, iv_special->GetBitLength()); |
| 525 | l_length = std::min(l_length, iv_proccs->GetBitLength()); |
| 526 | l_length = std::min(l_length, iv_hostattn->GetBitLength()); |
| 527 | iv_iBS = BitStringBuffer(l_length); |
| 528 | iv_bs = &iv_iBS; |
| 529 | } |
| 530 | |
| 531 | AttnTypeRegister & operator=(const AttnTypeRegister & r) |
| 532 | { |
| 533 | //iv_null = r.iv_null; <-- don't do this! |
| 534 | iv_check = (r.iv_check == &r.cv_null ? &cv_null : r.iv_check); |
| 535 | iv_recov = (r.iv_recov == &r.cv_null ? &cv_null : r.iv_recov); |
| 536 | iv_special = (r.iv_special == &r.cv_null ? &cv_null : r.iv_special); |
| 537 | iv_proccs = (r.iv_proccs == &r.cv_null ? &cv_null : r.iv_proccs); |
| 538 | iv_hostattn = (r.iv_hostattn == &r.cv_null ? &cv_null : r.iv_hostattn); |
| 539 | iv_iBS = r.iv_iBS; |
| 540 | //iv_bs = r.iv_bs; <-- don't do this! |
| 541 | return *this; |
| 542 | } |
| 543 | |
| 544 | virtual uint32_t Read() const |
| 545 | { |
| 546 | return iv_check->Read() | iv_recov->Read() | |
| 547 | iv_special->Read() | iv_proccs->Read() | |
| 548 | iv_hostattn->Read(); |
| 549 | } |
| 550 | |
| 551 | virtual uint32_t Write() |
| 552 | { |
| 553 | return iv_check->Write() | iv_recov->Write() | |
| 554 | iv_special->Write() | iv_proccs->Write() | |
| 555 | iv_hostattn->Write(); |
| 556 | } |
| 557 | |
| 558 | const BitString * GetBitString( |
| 559 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 560 | { |
| 561 | switch (i_type) |
| 562 | { |
| 563 | case CHECK_STOP: |
| 564 | (*iv_bs) = BitStringBuffer( |
| 565 | *iv_check->GetBitString(i_type)); |
| 566 | break; |
| 567 | |
| 568 | case RECOVERABLE: |
| 569 | (*iv_bs) = BitStringBuffer( |
| 570 | *iv_recov->GetBitString(i_type)); |
| 571 | break; |
| 572 | |
| 573 | case SPECIAL: |
| 574 | (*iv_bs) = BitStringBuffer( |
| 575 | *iv_special->GetBitString(i_type)); |
| 576 | break; |
| 577 | |
| 578 | case PROC_CS: |
| 579 | (*iv_bs) = BitStringBuffer( |
| 580 | *iv_proccs->GetBitString(i_type)); |
| 581 | break; |
| 582 | |
| 583 | case HOST_ATTN: |
| 584 | (*iv_bs) = BitStringBuffer( |
| 585 | *iv_hostattn->GetBitString(i_type)); |
| 586 | break; |
| 587 | } |
| 588 | |
| 589 | return iv_bs; |
| 590 | } |
| 591 | |
| 592 | virtual uint16_t GetId() const |
| 593 | { |
| 594 | uint16_t l_rc = Prdr::SignatureOp::DEFAULT_SIGNATURE; |
| 595 | l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_check->GetId()); |
| 596 | l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_recov->GetId()); |
| 597 | l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_special->GetId()); |
| 598 | l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_proccs->GetId()); |
| 599 | l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_hostattn->GetId()); |
| 600 | return l_rc; |
| 601 | } |
| 602 | |
| 603 | virtual void SetId(uint16_t i_id) {} |
| 604 | |
| 605 | bool operator==(const AttnTypeRegister & r) const |
| 606 | { |
| 607 | return (r.iv_check == iv_check) && (r.iv_recov == iv_recov) && |
| 608 | (r.iv_special == iv_special) && (r.iv_proccs == iv_proccs) && |
| 609 | (r.iv_special == iv_hostattn); |
| 610 | } |
| 611 | |
| 612 | protected: |
| 613 | BitString & AccessBitString(void) { return iv_iBS; } |
| 614 | void SetBitString(const BitString *) {} |
| 615 | |
| 616 | private: |
| 617 | static NullRegister cv_null; |
| 618 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 619 | Register * iv_check; |
| 620 | Register * iv_recov; |
| 621 | Register * iv_special; |
| 622 | Register * iv_proccs; |
| 623 | Register * iv_hostattn; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 624 | |
| 625 | BitStringBuffer * iv_bs; |
| 626 | BitStringBuffer iv_iBS; |
| 627 | }; |
| 628 | |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 629 | class ConstantRegister : public Register |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 630 | { |
| 631 | public: |
| 632 | ConstantRegister() : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 633 | Register( ), iv_iBS(0) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 634 | {} |
| 635 | |
| 636 | ConstantRegister( const BitStringBuffer & i_arg ) : |
Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 637 | Register( ), iv_iBS(i_arg) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 638 | {} |
| 639 | |
| 640 | ConstantRegister & operator=(const ConstantRegister & r) |
| 641 | { |
| 642 | iv_iBS = r.iv_iBS; |
| 643 | return *this; |
| 644 | } |
| 645 | |
| 646 | virtual uint32_t Read() const { return SUCCESS; } |
| 647 | virtual uint32_t Write() { return SUCCESS; } |
| 648 | |
| 649 | const BitString * GetBitString( |
| 650 | ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const |
| 651 | { |
| 652 | return &iv_iBS; |
| 653 | } |
| 654 | |
| 655 | virtual uint16_t GetId() const |
| 656 | { return Prdr::SignatureOp::DEFAULT_SIGNATURE; } |
| 657 | |
| 658 | virtual void SetId(uint16_t i_id) {} |
| 659 | |
| 660 | bool operator==(const ConstantRegister & r) const |
| 661 | { return r.iv_iBS == iv_iBS; } |
| 662 | |
| 663 | protected: |
| 664 | BitString & AccessBitString(void) { return iv_iBS; } |
| 665 | void SetBitString(const BitString *) {} |
| 666 | |
| 667 | private: |
| 668 | BitStringBuffer iv_iBS; |
| 669 | }; |
| 670 | |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 671 | } // end namespace libhei |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 672 | |