Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | d6826e5 | 2020-11-10 17:39:00 -0600 | [diff] [blame] | 2 | <attn_node name="TLXFIR" model_ec="EXPLORER_11,EXPLORER_20" reg_type="SCOM"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 3 | |
| 4 | <local_fir name="TLXFIR" config="W"> |
| 5 | <instance reg_inst="0" addr="0x08012400" /> |
| 6 | <action attn_type="UCS" config="00" /> |
| 7 | <action attn_type="RE" config="01" /> |
| 8 | <action attn_type="HA" config="10" /> |
| 9 | </local_fir> |
| 10 | |
Zane Shelley | bb34f29 | 2021-07-09 10:50:05 -0500 | [diff] [blame^] | 11 | <register name="TLX_ERR_RPT_0"> |
| 12 | <instance reg_inst="0" addr="0x0801241C" /> |
| 13 | </register> |
| 14 | |
| 15 | <register name="TLX_ERR_RPT_1"> |
| 16 | <instance reg_inst="0" addr="0x0801241D" /> |
| 17 | </register> |
| 18 | |
| 19 | <register name="TLX_ERR_RPT_2"> |
| 20 | <instance reg_inst="0" addr="0x0801241E" /> |
| 21 | </register> |
| 22 | |
| 23 | <register name="TLX_ERR_RPT_0_MASK"> |
| 24 | <instance reg_inst="0" addr="0x08012414" /> |
| 25 | </register> |
| 26 | |
| 27 | <register name="TLX_ERR_RPT_1_MASK"> |
| 28 | <instance reg_inst="0" addr="0x08012415" /> |
| 29 | </register> |
| 30 | |
| 31 | <register name="TLX_ERR_RPT_2_MASK"> |
| 32 | <instance reg_inst="0" addr="0x08012416" /> |
| 33 | </register> |
| 34 | |
| 35 | <capture_group node_inst="0"> |
| 36 | <capture_register reg_name="TLX_ERR_RPT_0" reg_inst="0" /> |
| 37 | <capture_register reg_name="TLX_ERR_RPT_1" reg_inst="0" /> |
| 38 | <capture_register reg_name="TLX_ERR_RPT_2" reg_inst="0" /> |
| 39 | <capture_register reg_name="TLX_ERR_RPT_0_MASK" reg_inst="0" /> |
| 40 | <capture_register reg_name="TLX_ERR_RPT_1_MASK" reg_inst="0" /> |
| 41 | <capture_register reg_name="TLX_ERR_RPT_2_MASK" reg_inst="0" /> |
| 42 | </capture_group> |
| 43 | |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 44 | <bit pos= "0" >Info reg parity error</bit> |
| 45 | <bit pos= "1" >Ctrl reg parity error</bit> |
| 46 | <bit pos= "2" >TLX VC0 return credit counter overflow</bit> |
| 47 | <bit pos= "3" >TLX VC1 return credit counter overflow</bit> |
| 48 | <bit pos= "4" >TLX dcp0 return credit counter overflow</bit> |
| 49 | <bit pos= "5" >TLX dcp1 return credit counter overflow</bit> |
| 50 | <bit pos= "6" >TLX credit management block error</bit> |
| 51 | <bit pos= "7" >TLX credit management block parity error</bit> |
| 52 | <bit pos= "8" >TLXT fatal parity error</bit> |
Zane Shelley | bb34f29 | 2021-07-09 10:50:05 -0500 | [diff] [blame^] | 53 | <bit pos= "9" child_node="TLX_ERR_RPT_1">TLXT recoverable error</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 54 | <bit pos="10" >TLXT configuration error</bit> |
| 55 | <bit pos="11" >TLXT informational parity error</bit> |
| 56 | <bit pos="12" >TLXT hard error</bit> |
| 57 | <bit pos="13:15">Reserved</bit> |
| 58 | <bit pos="16" >Corrupted pad mem pattern</bit> |
| 59 | <bit pos="17" >Downstream OC parity error</bit> |
| 60 | <bit pos="18" >OC malformed</bit> |
| 61 | <bit pos="19" >OC protocol error</bit> |
| 62 | <bit pos="20" >Address translate error</bit> |
| 63 | <bit pos="21" >Metadata unc or data parity error</bit> |
| 64 | <bit pos="22" >OC unsupported group 2</bit> |
| 65 | <bit pos="23" >OC unsupported group 1</bit> |
| 66 | <bit pos="24" >Bit flip control error</bit> |
| 67 | <bit pos="25" >Control HW error</bit> |
| 68 | <bit pos="26" >ECC corrected and others</bit> |
| 69 | <bit pos="27" >Trace stop</bit> |
| 70 | <bit pos="28" >Internal SCOM error</bit> |
| 71 | <bit pos="29" >Internal SCOM error clone</bit> |
| 72 | |
| 73 | </attn_node> |