Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 1 | #include <chip_data/hei_chip_data.hpp> |
| 2 | #include <chip_data/hei_chip_data_stream.hpp> |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 3 | #include <register/hei_operator_register.hpp> |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 4 | #include <register/hei_scom_register.hpp> |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 5 | |
| 6 | namespace libhei |
| 7 | { |
| 8 | |
| 9 | //------------------------------------------------------------------------------ |
| 10 | |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 11 | using SectionKeyword_t = uint32_t; |
| 12 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 13 | constexpr SectionKeyword_t KW_REGS = 0x52454753; // "REGS" ASCII |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 14 | constexpr SectionKeyword_t KW_NODE = 0x4e4f4445; // "NODE" ASCII |
| 15 | constexpr SectionKeyword_t KW_ROOT = 0x524f4f54; // "ROOT" ASCII |
| 16 | |
| 17 | using Version_t = uint8_t; |
| 18 | |
| 19 | constexpr Version_t VERSION_1 = 0x01; |
| 20 | |
| 21 | //------------------------------------------------------------------------------ |
| 22 | |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 23 | void __readRegister(ChipDataStream& io_stream, IsolationChip::Ptr& io_isoChip) |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 24 | { |
| 25 | // Read the register metadata. |
| 26 | RegisterId_t id; |
| 27 | RegisterType_t type; |
| 28 | RegisterAttributeFlags_t attr; |
| 29 | Instance_t numInsts; |
| 30 | io_stream >> id >> type >> attr >> numInsts; |
| 31 | |
| 32 | // Must have at least one instance. |
| 33 | HEI_ASSERT(0 != numInsts); |
| 34 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 35 | for (unsigned int i = 0; i < numInsts; i++) |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 36 | { |
| 37 | // Read the register instance metadata. |
| 38 | Instance_t inst; |
| 39 | io_stream >> inst; |
| 40 | |
| 41 | // The address size is dependent on the register type. |
| 42 | if (REG_TYPE_SCOM == type) |
| 43 | { |
| 44 | uint32_t addr; // 4-byte address. |
| 45 | io_stream >> addr; |
| 46 | |
| 47 | // Get this register from the flyweight factory. |
| 48 | auto& factory = Flyweight<const ScomRegister>::getSingleton(); |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 49 | auto hwReg = factory.get(id, inst, attr, addr); |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 50 | |
| 51 | // Add this register to the isolation chip. |
| 52 | io_isoChip->addHardwareRegister(hwReg); |
| 53 | } |
| 54 | else if (REG_TYPE_ID_SCOM == type) |
| 55 | { |
| 56 | uint64_t addr; // 8-byte address. |
| 57 | io_stream >> addr; |
| 58 | |
| 59 | // Get this register from the flyweight factory. |
| 60 | auto& factory = Flyweight<const IdScomRegister>::getSingleton(); |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 61 | auto hwReg = factory.get(id, inst, attr, addr); |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 62 | |
| 63 | // Add this register to the isolation chip. |
| 64 | io_isoChip->addHardwareRegister(hwReg); |
| 65 | } |
| 66 | else |
| 67 | { |
| 68 | HEI_ASSERT(false); // Register type unsupported. |
| 69 | } |
| 70 | } |
| 71 | } |
| 72 | |
| 73 | //------------------------------------------------------------------------------ |
| 74 | |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 75 | Register::ConstPtr __readExpr(ChipDataStream& io_stream, |
| 76 | const IsolationChip::Ptr& i_isoChip, |
| 77 | IsolationNode::Ptr& io_isoNode) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 78 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 79 | Register::ConstPtr expr{}; |
| 80 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 81 | uint8_t exprType; |
| 82 | io_stream >> exprType; |
| 83 | switch (exprType) |
| 84 | { |
| 85 | case 0x01: // register reference |
| 86 | { |
| 87 | RegisterId_t regId; |
| 88 | Instance_t regInst; |
| 89 | io_stream >> regId >> regInst; |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 90 | |
| 91 | // Find the hardware register that is stored in this isolation chip |
| 92 | // and add it to the list of capture registers. This ensures all |
| 93 | // registers referenced in the rules are are captured by default. |
| 94 | // Note that this will assert that the target register must exist in |
| 95 | // the isolation chip. |
| 96 | auto hwReg = i_isoChip->getHardwareRegister({regId, regInst}); |
| 97 | |
| 98 | // Add the register to the isolation node. |
| 99 | io_isoNode->addCaptureRegister(hwReg); |
| 100 | |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 101 | // Simply return this register. |
| 102 | expr = hwReg; |
| 103 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 104 | break; |
| 105 | } |
| 106 | case 0x02: // integer constant |
| 107 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 108 | auto& factory = Flyweight<const ConstantRegister>::getSingleton(); |
| 109 | |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 110 | if (REG_TYPE_SCOM == io_isoNode->getRegisterType() || |
| 111 | REG_TYPE_ID_SCOM == io_isoNode->getRegisterType()) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 112 | { |
| 113 | uint64_t constant; // 8-byte value |
| 114 | io_stream >> constant; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 115 | |
| 116 | // Create the constant register and put it in the flyweights. |
| 117 | expr = factory.get(constant); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 118 | } |
| 119 | else |
| 120 | { |
| 121 | HEI_ASSERT(false); // register type unsupported |
| 122 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 123 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 124 | break; |
| 125 | } |
| 126 | case 0x10: // AND operation |
| 127 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 128 | auto& factory = Flyweight<const AndRegister>::getSingleton(); |
| 129 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 130 | uint8_t numSubExpr; |
| 131 | io_stream >> numSubExpr; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 132 | |
| 133 | HEI_ASSERT(2 <= numSubExpr); // must be at least two |
| 134 | |
| 135 | // Read the first two sub-expressions. |
| 136 | auto e1 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 137 | auto e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 138 | HEI_ASSERT(e1 && e2); // Cannot be null |
| 139 | |
| 140 | // Create the AND register and put it in the flyweights. |
| 141 | expr = factory.get(e1, e2); |
| 142 | |
| 143 | // Iterate any remaining expressions. |
| 144 | for (uint8_t i = 2; i < numSubExpr; i++) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 145 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 146 | // Read the next sub-expressions. |
| 147 | e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 148 | HEI_ASSERT(e2); // Cannot be null |
| 149 | |
| 150 | // Create the AND register and put it in the flyweights. |
| 151 | expr = factory.get(expr, e2); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 152 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 153 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 154 | break; |
| 155 | } |
| 156 | case 0x11: // OR operation |
| 157 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 158 | auto& factory = Flyweight<const OrRegister>::getSingleton(); |
| 159 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 160 | uint8_t numSubExpr; |
| 161 | io_stream >> numSubExpr; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 162 | |
| 163 | HEI_ASSERT(2 <= numSubExpr); // must be at least two |
| 164 | |
| 165 | // Read the first two sub-expressions. |
| 166 | auto e1 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 167 | auto e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 168 | HEI_ASSERT(e1 && e2); // Cannot be null |
| 169 | |
| 170 | // Create the OR register and put it in the flyweights. |
| 171 | expr = factory.get(e1, e2); |
| 172 | |
| 173 | // Iterate any remaining expressions. |
| 174 | for (uint8_t i = 2; i < numSubExpr; i++) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 175 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 176 | // Read the next sub-expressions. |
| 177 | e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 178 | HEI_ASSERT(e2); // Cannot be null |
| 179 | |
| 180 | // Create the OR register and put it in the flyweights. |
| 181 | expr = factory.get(expr, e2); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 182 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 183 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 184 | break; |
| 185 | } |
| 186 | case 0x12: // NOT operation |
| 187 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 188 | auto& factory = Flyweight<const NotRegister>::getSingleton(); |
| 189 | |
| 190 | // Read the sub-expression |
| 191 | auto e = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 192 | HEI_ASSERT(e); // Cannot be null |
| 193 | |
| 194 | // Create the NOT register and put it in the flyweights. |
| 195 | expr = factory.get(e); |
| 196 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 197 | break; |
| 198 | } |
| 199 | case 0x13: // left shift operation |
| 200 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 201 | auto& factory = Flyweight<const LeftShiftRegister>::getSingleton(); |
| 202 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 203 | uint8_t shiftValue; |
| 204 | io_stream >> shiftValue; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 205 | |
| 206 | // Read the sub-expression |
| 207 | auto e = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 208 | HEI_ASSERT(e); // Cannot be null |
| 209 | |
| 210 | // Create the left shift register and put it in the flyweights. |
| 211 | expr = factory.get(e, shiftValue); |
| 212 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 213 | break; |
| 214 | } |
| 215 | case 0x14: // right shift operation |
| 216 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 217 | auto& factory = Flyweight<const RightShiftRegister>::getSingleton(); |
| 218 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 219 | uint8_t shiftValue; |
| 220 | io_stream >> shiftValue; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 221 | |
| 222 | // Read the sub-expression |
| 223 | auto e = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 224 | HEI_ASSERT(e); // Cannot be null |
| 225 | |
| 226 | // Create the right shift register and put it in the flyweights. |
| 227 | expr = factory.get(e, shiftValue); |
| 228 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 229 | break; |
| 230 | } |
| 231 | default: |
| 232 | HEI_ASSERT(false); // unsupported expression type |
| 233 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 234 | |
| 235 | return expr; |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | //------------------------------------------------------------------------------ |
| 239 | |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 240 | using TmpChildNodeMap = std::map<BitPosition_t, IsolationNode::Key>; |
| 241 | using TmpNodeData = std::pair<IsolationNode::Ptr, TmpChildNodeMap>; |
| 242 | using TmpNodeMap = std::map<IsolationNode::Key, TmpNodeData>; |
| 243 | |
| 244 | void __readNode(ChipDataStream& io_stream, const IsolationChip::Ptr& i_isoChip, |
| 245 | TmpNodeMap& io_tmpNodeMap) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 246 | { |
| 247 | // Read the node metadata. |
| 248 | NodeId_t nodeId; |
| 249 | RegisterType_t regType; |
| 250 | Instance_t numInsts; |
| 251 | io_stream >> nodeId >> regType >> numInsts; |
| 252 | |
| 253 | for (unsigned int i = 0; i < numInsts; i++) |
| 254 | { |
| 255 | // Read the node instance metadata. |
| 256 | Instance_t nodeInst; |
| 257 | uint8_t numCapRegs, numIsoRules, numChildNodes; |
| 258 | io_stream >> nodeInst >> numCapRegs >> numIsoRules >> numChildNodes; |
| 259 | |
Zane Shelley | bcb4395 | 2021-07-08 22:13:57 -0500 | [diff] [blame] | 260 | // It is possible to have rules defined and no child nodes, However, if |
| 261 | // there are no rules defined (FFDC-only node), there should not be |
| 262 | // any child nodes defined. |
| 263 | HEI_ASSERT(0 != numIsoRules || 0 == numChildNodes); |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 264 | |
| 265 | // Allocate memory for this isolation node. |
| 266 | auto isoNode = |
| 267 | std::make_shared<IsolationNode>(nodeId, nodeInst, regType); |
| 268 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 269 | // Add capture registers. |
| 270 | for (unsigned int j = 0; j < numCapRegs; j++) |
| 271 | { |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 272 | // Read the capture register metadata. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 273 | RegisterId_t regId; |
| 274 | Instance_t regInst; |
| 275 | io_stream >> regId >> regInst; |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 276 | |
| 277 | // Find the hardware register that is stored in this isolation chip |
| 278 | // and add it to the list of capture registers. Note that this will |
| 279 | // assert that the target register must exist in the isolation chip. |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 280 | auto hwReg = i_isoChip->getHardwareRegister({regId, regInst}); |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 281 | |
| 282 | // Add the register to the isolation node. |
| 283 | isoNode->addCaptureRegister(hwReg); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | // Add isolation rules. |
| 287 | for (unsigned int j = 0; j < numIsoRules; j++) |
| 288 | { |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 289 | // Read the rule metadata. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 290 | AttentionType_t attnType; |
| 291 | io_stream >> attnType; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 292 | |
| 293 | // Read out the rule for this attention type. |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 294 | auto rule = __readExpr(io_stream, i_isoChip, isoNode); |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame] | 295 | HEI_ASSERT(rule); // Cannot be null |
| 296 | |
| 297 | // Add the rule to the isolation node. |
| 298 | isoNode->addRule(attnType, rule); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 299 | } |
| 300 | |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 301 | // At this point, we will need to read out the child node metadata. |
| 302 | // However, we can't look up the child nodes and add them to this |
| 303 | // isolation node yet because we are still in the process of parsing |
| 304 | // them out of the Chip Data File. Therefore, we'll save a temporary map |
| 305 | // containing the child node information which will be used to look up |
| 306 | // the actual node objects later. |
| 307 | TmpChildNodeMap cMap{}; |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 308 | for (unsigned int j = 0; j < numChildNodes; j++) |
| 309 | { |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 310 | // Read the child node metadata. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 311 | BitPosition_t bit; |
Zane Shelley | d065924 | 2020-05-15 23:02:29 -0500 | [diff] [blame] | 312 | NodeId_t childId; |
| 313 | Instance_t childInst; |
| 314 | io_stream >> bit >> childId >> childInst; |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 315 | |
| 316 | auto ret = |
| 317 | cMap.emplace(bit, IsolationNode::Key{childId, childInst}); |
| 318 | HEI_ASSERT(ret.second); // Should not have duplicate entries |
| 319 | } |
| 320 | |
| 321 | // Add this isolation node with the temporary child node map to the |
| 322 | // returned map of nodes. |
| 323 | auto ret = io_tmpNodeMap.emplace(IsolationNode::Key{nodeId, nodeInst}, |
| 324 | TmpNodeData{isoNode, cMap}); |
| 325 | HEI_ASSERT(ret.second); // Should not have duplicate entries |
| 326 | } |
| 327 | } |
| 328 | |
| 329 | //------------------------------------------------------------------------------ |
| 330 | |
| 331 | void __insertNodes(IsolationChip::Ptr& io_isoChip, |
| 332 | const TmpNodeMap& i_tmpNodeMap) |
| 333 | { |
| 334 | for (const auto& n : i_tmpNodeMap) |
| 335 | { |
| 336 | const IsolationNode::Ptr& node = n.second.first; |
| 337 | const TmpChildNodeMap& childMap = n.second.second; |
| 338 | |
| 339 | // Link the child nodes, if they exist. |
| 340 | for (const auto& c : childMap) |
| 341 | { |
| 342 | const BitPosition_t& bit = c.first; |
| 343 | const IsolationNode::Key& childKey = c.second; |
| 344 | |
| 345 | // Find the child node in the temporary map. |
| 346 | auto itr = i_tmpNodeMap.find(childKey); |
| 347 | HEI_ASSERT(i_tmpNodeMap.end() != itr); // Child node must exist. |
| 348 | |
| 349 | const IsolationNode::Ptr& child = itr->second.first; |
| 350 | |
| 351 | node->addChild(bit, child); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 352 | } |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 353 | |
| 354 | // Add this node to the isolation chip. |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 355 | io_isoChip->addIsolationNode(node); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 356 | } |
| 357 | } |
| 358 | |
| 359 | //------------------------------------------------------------------------------ |
| 360 | |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 361 | void __readRoot(ChipDataStream& io_stream, IsolationChip::Ptr& io_isoChip) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 362 | { |
Zane Shelley | 2467db8 | 2020-05-18 19:56:30 -0500 | [diff] [blame] | 363 | // Read the root node metadata. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 364 | AttentionType_t attnType; |
| 365 | NodeId_t id; |
| 366 | Instance_t inst; |
| 367 | io_stream >> attnType >> id >> inst; |
Zane Shelley | 2467db8 | 2020-05-18 19:56:30 -0500 | [diff] [blame] | 368 | |
| 369 | // Add the root node. |
| 370 | io_isoChip->addRootNode(attnType, io_isoChip->getIsolationNode({id, inst})); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 371 | } |
| 372 | |
| 373 | //------------------------------------------------------------------------------ |
| 374 | |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 375 | void parseChipDataFile(void* i_buffer, size_t i_bufferSize, |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 376 | IsolationChip::Map& io_isoChips) |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 377 | { |
| 378 | ChipDataStream stream{i_buffer, i_bufferSize}; |
| 379 | |
| 380 | // Read the file metadata. |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 381 | FileKeyword_t fileKeyword; |
| 382 | ChipType_t chipType; |
| 383 | Version_t version; |
| 384 | stream >> fileKeyword >> chipType >> version; |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 385 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 386 | // Check the file keyword. |
| 387 | HEI_ASSERT(KW_CHIPDATA == fileKeyword); |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 388 | |
| 389 | // This chip type should not already exist. |
| 390 | HEI_ASSERT(io_isoChips.end() == io_isoChips.find(chipType)); |
| 391 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 392 | // So far there is only one supported version type so check it here. |
| 393 | HEI_ASSERT(VERSION_1 == version); |
| 394 | |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 395 | // Allocate memory for the new isolation chip. |
| 396 | auto isoChip = std::make_unique<IsolationChip>(chipType); |
| 397 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 398 | // Read the register list metadata. |
| 399 | SectionKeyword_t regsKeyword; |
| 400 | RegisterId_t numRegs; |
| 401 | stream >> regsKeyword >> numRegs; |
| 402 | |
| 403 | // Check the register keyword. |
| 404 | HEI_ASSERT(KW_REGS == regsKeyword); |
| 405 | |
| 406 | // There must be at least one register defined. |
| 407 | HEI_ASSERT(0 != numRegs); |
| 408 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 409 | for (unsigned int i = 0; i < numRegs; i++) |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 410 | { |
| 411 | __readRegister(stream, isoChip); |
| 412 | } |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 413 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 414 | // Read the node list metadata. |
| 415 | SectionKeyword_t nodeKeyword; |
| 416 | NodeId_t numNodes; |
| 417 | stream >> nodeKeyword >> numNodes; |
| 418 | |
| 419 | // Check the node keyword. |
| 420 | HEI_ASSERT(KW_NODE == nodeKeyword); |
| 421 | |
| 422 | // There must be at least one node defined. |
| 423 | HEI_ASSERT(0 != numNodes); |
| 424 | |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 425 | TmpNodeMap tmpNodeMap; // Stores all nodes with child node map. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 426 | for (unsigned int i = 0; i < numNodes; i++) |
| 427 | { |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 428 | __readNode(stream, isoChip, tmpNodeMap); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 429 | } |
Zane Shelley | f229d5f | 2020-05-17 21:13:41 -0500 | [diff] [blame] | 430 | // Link all nodes with their child nodes. Then add them to isoChip. |
| 431 | __insertNodes(isoChip, tmpNodeMap); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 432 | |
| 433 | // Read the root node list metadata. |
| 434 | SectionKeyword_t rootKeyword; |
| 435 | AttentionType_t numRoots; |
| 436 | stream >> rootKeyword >> numRoots; |
| 437 | |
| 438 | // Check the root node keyword. |
| 439 | HEI_ASSERT(KW_ROOT == rootKeyword); |
| 440 | |
| 441 | // There must be at least one register defined. |
| 442 | HEI_ASSERT(0 != numRoots); |
| 443 | |
| 444 | for (unsigned int i = 0; i < numRoots; i++) |
| 445 | { |
| 446 | __readRoot(stream, isoChip); |
| 447 | } |
| 448 | |
| 449 | // At this point, the stream is done and it should be at the end of the |
| 450 | // file. |
| 451 | HEI_ASSERT(stream.eof()); |
| 452 | |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 453 | // Add this isolation chip to the collective list of isolation chips. |
| 454 | auto ret = io_isoChips.emplace(chipType, std::move(isoChip)); |
| 455 | HEI_ASSERT(ret.second); // Just in case. |
| 456 | } |
| 457 | |
| 458 | //------------------------------------------------------------------------------ |
| 459 | |
| 460 | } // namespace libhei |