Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_10,P10_20" name="CFIR_IOHS_CS_RE_SPA" reg_type="SCOM"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 3 | <register name="CFIR_IOHS_XSTOP"> |
| 4 | <instance addr="0x18040000" reg_inst="0"/> |
| 5 | <instance addr="0x19040000" reg_inst="1"/> |
| 6 | <instance addr="0x1A040000" reg_inst="2"/> |
| 7 | <instance addr="0x1B040000" reg_inst="3"/> |
| 8 | <instance addr="0x1C040000" reg_inst="4"/> |
| 9 | <instance addr="0x1D040000" reg_inst="5"/> |
| 10 | <instance addr="0x1E040000" reg_inst="6"/> |
| 11 | <instance addr="0x1F040000" reg_inst="7"/> |
| 12 | </register> |
| 13 | <register name="CFIR_IOHS_XSTOP_MASK"> |
| 14 | <instance addr="0x18040040" reg_inst="0"/> |
| 15 | <instance addr="0x19040040" reg_inst="1"/> |
| 16 | <instance addr="0x1A040040" reg_inst="2"/> |
| 17 | <instance addr="0x1B040040" reg_inst="3"/> |
| 18 | <instance addr="0x1C040040" reg_inst="4"/> |
| 19 | <instance addr="0x1D040040" reg_inst="5"/> |
| 20 | <instance addr="0x1E040040" reg_inst="6"/> |
| 21 | <instance addr="0x1F040040" reg_inst="7"/> |
| 22 | </register> |
| 23 | <register name="CFIR_IOHS_RECOV"> |
| 24 | <instance addr="0x18040001" reg_inst="0"/> |
| 25 | <instance addr="0x19040001" reg_inst="1"/> |
| 26 | <instance addr="0x1A040001" reg_inst="2"/> |
| 27 | <instance addr="0x1B040001" reg_inst="3"/> |
| 28 | <instance addr="0x1C040001" reg_inst="4"/> |
| 29 | <instance addr="0x1D040001" reg_inst="5"/> |
| 30 | <instance addr="0x1E040001" reg_inst="6"/> |
| 31 | <instance addr="0x1F040001" reg_inst="7"/> |
| 32 | </register> |
| 33 | <register name="CFIR_IOHS_RECOV_MASK"> |
| 34 | <instance addr="0x18040041" reg_inst="0"/> |
| 35 | <instance addr="0x19040041" reg_inst="1"/> |
| 36 | <instance addr="0x1A040041" reg_inst="2"/> |
| 37 | <instance addr="0x1B040041" reg_inst="3"/> |
| 38 | <instance addr="0x1C040041" reg_inst="4"/> |
| 39 | <instance addr="0x1D040041" reg_inst="5"/> |
| 40 | <instance addr="0x1E040041" reg_inst="6"/> |
| 41 | <instance addr="0x1F040041" reg_inst="7"/> |
| 42 | </register> |
| 43 | <register name="CFIR_IOHS_SPATTN"> |
| 44 | <instance addr="0x18040002" reg_inst="0"/> |
| 45 | <instance addr="0x19040002" reg_inst="1"/> |
| 46 | <instance addr="0x1A040002" reg_inst="2"/> |
| 47 | <instance addr="0x1B040002" reg_inst="3"/> |
| 48 | <instance addr="0x1C040002" reg_inst="4"/> |
| 49 | <instance addr="0x1D040002" reg_inst="5"/> |
| 50 | <instance addr="0x1E040002" reg_inst="6"/> |
| 51 | <instance addr="0x1F040002" reg_inst="7"/> |
| 52 | </register> |
| 53 | <register name="CFIR_IOHS_SPATTN_MASK"> |
| 54 | <instance addr="0x18040042" reg_inst="0"/> |
| 55 | <instance addr="0x19040042" reg_inst="1"/> |
| 56 | <instance addr="0x1A040042" reg_inst="2"/> |
| 57 | <instance addr="0x1B040042" reg_inst="3"/> |
| 58 | <instance addr="0x1C040042" reg_inst="4"/> |
| 59 | <instance addr="0x1D040042" reg_inst="5"/> |
| 60 | <instance addr="0x1E040042" reg_inst="6"/> |
| 61 | <instance addr="0x1F040042" reg_inst="7"/> |
| 62 | </register> |
| 63 | <rule attn_type="CS" node_inst="0:7"> |
| 64 | <expr type="and"> |
| 65 | <expr type="reg" value1="CFIR_IOHS_XSTOP"/> |
| 66 | <expr type="not"> |
| 67 | <expr type="reg" value1="CFIR_IOHS_XSTOP_MASK"/> |
| 68 | </expr> |
| 69 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 70 | </expr> |
| 71 | </rule> |
| 72 | <rule attn_type="RE" node_inst="0:7"> |
| 73 | <expr type="and"> |
| 74 | <expr type="reg" value1="CFIR_IOHS_RECOV"/> |
| 75 | <expr type="not"> |
| 76 | <expr type="reg" value1="CFIR_IOHS_RECOV_MASK"/> |
| 77 | </expr> |
| 78 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 79 | </expr> |
| 80 | </rule> |
| 81 | <rule attn_type="SPA" node_inst="0:7"> |
| 82 | <expr type="and"> |
| 83 | <expr type="reg" value1="CFIR_IOHS_SPATTN"/> |
| 84 | <expr type="not"> |
| 85 | <expr type="reg" value1="CFIR_IOHS_SPATTN_MASK"/> |
| 86 | </expr> |
| 87 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 88 | </expr> |
| 89 | </rule> |
| 90 | <bit child_node="IOHS_LOCAL_FIR" node_inst="0,1,2,3,4,5,6,7" pos="4">Local FIR</bit> |
| 91 | <bit child_node="IOHS_DLP_FIR" node_inst="0,1,2,3,4,5,6,7" pos="5">PowerBus OLL FIR Register</bit> |
| 92 | </attn_node> |