blob: a1bcb5af8c22df37dcb8da79cfc1dfeb9683234d [file] [log] [blame]
Zane Shelleyf8a726b2020-12-16 21:29:32 -06001<?xml version="1.0" encoding="UTF-8"?>
2<attn_node model_ec="P10_10" name="CFIR_PAUE_CS_RE" reg_type="SCOM">
3 <register name="CFIR_PAUE_XSTOP">
4 <instance addr="0x10040000" reg_inst="0"/>
5 <instance addr="0x11040000" reg_inst="1"/>
6 </register>
7 <register name="CFIR_PAUE_XSTOP_MASK">
8 <instance addr="0x10040040" reg_inst="0"/>
9 <instance addr="0x11040040" reg_inst="1"/>
10 </register>
11 <register name="CFIR_PAUE_RECOV">
12 <instance addr="0x10040001" reg_inst="0"/>
13 <instance addr="0x11040001" reg_inst="1"/>
14 </register>
15 <register name="CFIR_PAUE_RECOV_MASK">
16 <instance addr="0x10040041" reg_inst="0"/>
17 <instance addr="0x11040041" reg_inst="1"/>
18 </register>
19 <rule attn_type="CS" node_inst="0:1">
20 <expr type="and">
21 <expr type="reg" value1="CFIR_PAUE_XSTOP"/>
22 <expr type="not">
23 <expr type="reg" value1="CFIR_PAUE_XSTOP_MASK"/>
24 </expr>
25 <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
26 </expr>
27 </rule>
28 <rule attn_type="RE" node_inst="0:1">
29 <expr type="and">
30 <expr type="reg" value1="CFIR_PAUE_RECOV"/>
31 <expr type="not">
32 <expr type="reg" value1="CFIR_PAUE_RECOV_MASK"/>
33 </expr>
34 <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
35 </expr>
36 </rule>
37 <bit child_node="PAU_LOCAL_FIR" node_inst="0,1" pos="4">Local FIR</bit>
38 <bit child_node="PAU_FIR_0" node_inst="0,3" pos="5">Local FIR register for the PAU (1 of 3)</bit>
39 <bit child_node="PAU_FIR_1" node_inst="0,3" pos="6">Local FIR register for the PAU (2 of 3)</bit>
40 <bit child_node="PAU_FIR_2" node_inst="0,3" pos="7">Local FIR register for the PAU (3 of 3)</bit>
41 <bit child_node="PAU_PHY_FIR" node_inst="0,1" pos="13">Local FIR register for the chip pervasive logic</bit>
42 <bit child_node="PAU_DL_FIR" node_inst="0,1" pos="14">Local FIR register for the chip pervasive logic</bit>
43 <bit child_node="PAU_PTL_FIR" node_inst="0,1" pos="16"/>
44</attn_node>