| Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame^] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
| 2 | <attn_node model_ec="P10_10" name="CFIR_PAUW_UCS" reg_type="SCOM"> |
| 3 | <register name="CFIR_PAUW_LOCAL_XSTOP"> |
| 4 | <instance addr="0x12040003" reg_inst="0"/> |
| 5 | <instance addr="0x13040003" reg_inst="1"/> |
| 6 | </register> |
| 7 | <register name="CFIR_PAUW_LOCAL_XSTOP_MASK"> |
| 8 | <instance addr="0x12040043" reg_inst="0"/> |
| 9 | <instance addr="0x13040043" reg_inst="1"/> |
| 10 | </register> |
| 11 | <rule attn_type="UCS" node_inst="0:1"> |
| 12 | <expr type="and"> |
| 13 | <expr type="reg" value1="CFIR_PAUW_LOCAL_XSTOP"/> |
| 14 | <expr type="not"> |
| 15 | <expr type="reg" value1="CFIR_PAUW_LOCAL_XSTOP_MASK"/> |
| 16 | </expr> |
| 17 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 18 | </expr> |
| 19 | </rule> |
| 20 | <bit child_node="PAU_LOCAL_FIR" node_inst="2,3" pos="4">Local FIR</bit> |
| 21 | <bit child_node="PAU_FIR_0" node_inst="4,6" pos="5">Local FIR register for the PAU (1 of 3)</bit> |
| 22 | <bit child_node="PAU_FIR_1" node_inst="4,6" pos="6">Local FIR register for the PAU (2 of 3)</bit> |
| 23 | <bit child_node="PAU_FIR_2" node_inst="4,6" pos="7">Local FIR register for the PAU (3 of 3)</bit> |
| 24 | <bit child_node="PAU_FIR_0" node_inst="5,7" pos="9">Local FIR register for the PAU (1 of 3)</bit> |
| 25 | <bit child_node="PAU_FIR_1" node_inst="5,7" pos="10">Local FIR register for the PAU (2 of 3)</bit> |
| 26 | <bit child_node="PAU_FIR_2" node_inst="5,7" pos="11">Local FIR register for the PAU (3 of 3)</bit> |
| 27 | <bit child_node="PAU_PHY_FIR" node_inst="2,3" pos="13">Local FIR register for the chip pervasive logic</bit> |
| 28 | <bit child_node="PAU_DL_FIR" node_inst="2,3" pos="14">Local FIR register for the chip pervasive logic</bit> |
| 29 | </attn_node> |